Linear Feedback Shift Registers for the Uninitiated
Jason Sachs assembled an eighteen-part deep dive into linear feedback shift registers, connecting the simple shift-register circuit to finite-field algebra and practical tools. The series walks through primitive polynomials, Berlekamp-Massey state recovery, libgf2-based analysis, discrete-log methods, and real-world uses from PRNGs and Gold codes to Reed-Solomon and CRC reverse-engineering. It’s a single reference for engineers who want both theory and working code.
2024 Embedded Online Conference's Schedule
Packed with live workshops, keynotes, and dozens of on-demand talks, the 2024 Embedded Online Conference hands you a full week of embedded-systems learning. Most theatre talks and microtalks drop early on April 26 to let you binge ahead, while major workshops and keynotes run live on Zoom with multiple 20-minute Q&A sessions. Use the schedule to add sessions to your agenda and expect occasional last-minute changes.
A design non-methodology
Although writing an RTOS or kernel may be an interesting project, it is unlikely to be a wise course of action.
Working with Microchip PIC 8-bit GPIO
The third in a series of five posts looks at GPIO with PIC 8-bit microcontrollers. After a detailed review of the registers for configuring and managing GPIO on the PIC18F47Q10 processor, a basic application is stood up programming those registers to blink external LEDs at 0.5Hz.
How to use I2C devices in (Apache) NuttX: Scanning for Devices
Hands-on guide to scanning I2C peripherals on NuttX using a Raspberry Pi Pico, showing how the RTOS exposes i2c master instances and the i2ctool. The article walks through where the RP2040 I2C driver lives, how to enable I2C0 in menuconfig, build and flash nuttx, and run the i2c dev command to probe the bus. Verify sensors like BMP280 or SSD1306 before registering drivers.
EOC 2024 - I Will Attend Giveaways!
Win serious test gear by helping spread the word about the Embedded Online Conference, invites Stephane. Share the provided image on LinkedIn with #EOC2024 and #embeddedsystems by April 29 to enter raffles for gear like a LulzBot Mini 2, Saleae Logic Pro 8, Joulescope JS220, and a DSC-5300 oscilloscope. It only takes a few minutes to qualify.
Blinkenlights 2.0
Nothing spells old movie computers like a panel of randomly blinking lights, but in fact, these so-called "blinkenlights" can be valuable indicators - especially in embedded systems where the user interface must be minimal, small and cheap. Control of these lights can be achieved using a very simple, real-time interpreted script, and this kind of solution may be extended to other and more complex embedded tasks.
You Don't Need an RTOS (Part 1)
In this first article, we'll compare our two contenders, the superloop and the RTOS. We'll define a few terms that help us describe exactly what functions a scheduler does and why an RTOS can help make certain systems work that wouldn't with a superloop. By the end of this article, you'll be able to: - Measure or calculate the deadlines, periods, and worst-case execution times for each task in your system, - Determine, using either a response-time analysis or a utilization test, if that set of tasks is schedulable using either a superloop or an RTOS, and - Assign RTOS task priorities optimally.
C++ Assertion? Well Yes, But Actually No.
Assertions are a double-edged sword - on one side you enforce program correctness catching bugs close to their origin, on the other your application is subject to run-time error, like any interpreted language. This article explores what C++ can offer to get the advantages of assertions, without risking the crashes by moving contract checking at compile time.
The volatile keyword
Although the C keyword volatile is very useful in embedded applications, care is needed to use it correctly and vigilance is required to ensure its correct implementation by compilers.
2025 Embedded Online Conference: Your Guide to This Year's Schedule
Stephane Boucher lays out a clear day-by-day guide to the 2025 Embedded Online Conference, highlighting keynotes, live workshops, and new features. The post explains the new track-based group Q&A format moderated by Jacob Beningo, early release of sponsored talks on May 9, and an attendee-only Discord for networking and follow-ups. Use this guide to plan which sessions and panels to prioritize.
Dealing With Fixed Point Fractions
Fixed-point fractional math is easy to botch, and this post lays out pragmatic ways to avoid those mistakes. It clarifies the difference between integer and fractional overflow, shows how Q notation helps track binary-point scaling, and explains why multiplies add sign bits that may require shifting. Read for concrete FPGA strategies: keeping bit growth, selective shifts, or aggressive normalization, plus testing tips.
Finite State Machines (FSM) in Embedded Systems (Part 2) - Simple C++ State Machine Engine
When implementing state machines in your project it is an advantage to rely on a tried and tested state machine engine. This component is reused for every kind of application and helps the developer focus on the domain part of the software. In this article, the design process that turns a custom C++ code into a finite-state machine engine is fully described with motivations and tradeoffs for each iteration.
Introduction to Microcontrollers - More On GPIO
Polarity matters: an output '1' does not always mean an LED lights, and inputs are just as picky. This post walks through LED driving basics, pull resistors for buttons, and practical bitwise techniques to read and write individual GPIO pins on AVR and STM32 boards. It also explains why polling rates and mechanical bounce make button handling trickier than it looks and what to watch for next.
Data Types for Control & DSP
Control engineers often default to double precision, but Tim Wescott shows that choice can waste CPU cycles on embedded targets. He separates numeric representation into floating point, integer, and fixed-point, then walks through the tradeoffs, including quantization, overflow, and performance. A concrete PID example highlights why integrator precision and ADC scaling should drive your choice of data type rather than habit.
How to Design Reliable Reset Circuits for Embedded Microcontrollers
In the world of embedded systems, the reset circuit is a critical component that ensures the microcontroller starts up correctly and recovers gracefully from unexpected events like power fluctuations or software crashes. A poorly designed reset circuit can lead to erratic behavior, system lockups, or even permanent damage to the microcontroller. For embedded engineers, designing a reliable reset circuit is essential for ensuring the stability and robustness of the system.
How to Analyze a Three-Op-Amp Instrumentation Amplifier
The three-op-amp instrumentation amplifier gives you high input impedance, improved net bandwidth, and much lower sensitivity to resistor mismatch than a single-op-amp differential stage. Jason M. Sachs walks through the algebra, numeric examples, and historical notes to show how the preamp isolates common-mode, why splitting gain boosts bandwidth, how overall gain can be set with one resistor, and what practical limits to watch.
Supply Chain Games: What Have We Learned From the Great Semiconductor Shortage of 2021? (Part 4)
The chip shortage didn't end with 2021, it moved into older process nodes where cars and industrial gear live. In this installment Jason Sachs explains why mature-node and trailing-edge capacity remain tightly constrained, how NCNR commitments and price increases are reshaping supplier behavior, and what companies like NXP and Microchip are doing to cope. He warns the imbalance could take multiple semiconductor cycles to fix.
Linear Feedback Shift Registers for the Uninitiated, Part VI: Sing Along with the Berlekamp-Massey Algorithm
Jason Sachs breaks down the Berlekamp-Massey algorithm and shows how to recover an LFSR's minimal connection polynomial from a stream of output bits. The article mixes intuition, worked examples, and Python code to demonstrate the update rule, visual debugging tables, and when the solution is unique. Expect practical implementation notes, a complexity discussion, and a libgf2 example you can run in an IPython notebook.
Cortex-M Exception Handling (Part 2)
Exception entry and return on Cortex-M look simple, but the hardware does a lot to preserve context, enforce privilege, and pick the right stack. This post walks through the processor actions after an exception is accepted: which registers get pushed, how CONTROL, MSP and PSP affect stack selection, how EXC_RETURN encodes the return path, and why VTOR and vector table alignment matter for handler lookup.
Linear Feedback Shift Registers for the Uninitiated, Part VIII: Matrix Methods and State Recovery
Matrix methods for LFSRs look intimidating, but Jason Sachs walks through companion-matrix representations and shows why they matter for time shifts and state recovery. He derives lookahead masks from powers of the companion matrix, then translates those matrix insights into efficient bitwise and finite-field algorithms. The article includes two simple state-recovery methods and working Python/libgf2 examples you can run and adapt.
Soft Skills For Embedded Systems Software Developers
Soft skills often determine whether an embedded project ships on time as much as technical chops do. This post lays out practical, engineer-friendly guidance on interpersonal skills, communication, time management, deep focus, asking for help, learning, and resilience. It mixes concrete tips like the documentation system, pomodoro and quiet hours with habits such as engineering notebooks and role-playing to make collaboration and productivity more reliable.
Introduction to Microcontrollers - More On Interrupts
Interrupts are powerful but dangerous, and Mike Silva breaks down how they actually behave on microcontrollers and why they can corrupt data. This post explains latched flags, pending and priority behavior, ISR nesting, and common read-modify-write hazards, then shows practical fixes like targeted interrupt masking and using atomic GPIO hardware so you can stop chasing sporadic bugs.
Two Capacitors Are Better Than One
Jason Sachs revisits a simple stacked RC trick that dramatically reduces DC error from capacitor insulation leakage in long time-constant filters. Splitting one RC into two stages forces most of the DC drop onto the lower capacitor, squaring the remaining error while changing the effective pole locations. The post walks through the math, practical component tradeoffs, and when to prefer a digital approach.
Padé Delay is Okay Today
High-order Padé approximations for time delays break in surprising ways, but the failure is not magic. Jason Sachs walks through why coefficient-based transfer functions and companion-form state-space are numerically fragile, shows how to compute poles and zeros directly from the hypergeometric form with Newton iteration, and demonstrates building modal or block-diagonal state-space realizations to make high-order Padé delays practical while noting remaining limits.
Byte and Switch (Part 2)
Running a thermistor front end from a single AA cell exposes problems you might not expect. Jason Sachs walks through a switchable-gain divider using a P-channel MOSFET and shows how MOSFET off-state leakage and low supply voltages can corrupt high-impedance temperature readings. The post compares bipolar transistors and analog switch ICs as fixes and gives practical component guidance for one-cell designs.
Slew Rate Limiters: Nonlinear and Proud of It!
Slew-rate limits are a small nonlinear detail that often decides whether a controller behaves nicely or wrecks hardware. Jason Sachs walks through why slew limits appear in electronics and actuators, then shows two practical digital ways to impose limits: constraining input increments and constraining input around the output. He compares performance on underdamped second-order systems, gives closed-form intuition for overshoot, and demonstrates simulations with scipy and ODE solvers.
The habitat of hardware bugs
Hardware bugs hide where you least expect them, not under the spotlight but in the nooks and crannies of system design. Yossi Kreinin argues that CPUs fail mostly in privileged areas used by OS kernels, DRAM chips and userspace memory are usually reliable, while DRAM controllers, PHYs, peripheral controllers, board bring-up, and uncommon bus protocol paths are fertile ground for quirks. Read this to learn where to look first when firmware misbehaves.
Lazy Properties in Python Using Descriptors
Python descriptors let you outsource attribute lookup, and Jason Sachs walks through a practical use: lazy, cached properties. He presents a LazyProperty descriptor that defaults to a WeakKeyDictionary cache so computed results are stored on first access and automatically purged when objects are garbage collected. The post shows how to share caches by value using attrkey or swap cache classes for different use cases.
Supply Chain Games: What Have We Learned From the Great Semiconductor Shortage of 2021? (Part 5)
Most of the time a wafer spends in a fab is spent waiting in queues, not being processed. Jason Sachs peels back why cycle times stretch weeks to months, covering WIP accounting, die and wafer banks, the days per mask layer metric, and how variability and utilization tradeoffs turned fab behavior into a major factor in the 2021 chip shortage.
