Hi
Can anyone help me. I am using a button press to cause the wdog to
reset my application.
I use
WDTCTL = WDT_ADLY_1000;
IE1 |= WDTIE;
while(1);
I dont relaod the wdog so the device resets.
Then at initialisation I use
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
// Xtal related activity
// Set the ACLK to use the 3.6864MHz Xtal
BCSCTL1 |= XTS; // ACLK = LFXT1 = HF XTAL
// Ensure that the XTAL STARTS UP
do
{
IFG1 &= ~OFIFG; // Clear OSCFault flag
for (i = 0xFFF; i > 0; i--); // Time for flag to set
}
while ((IFG1 & OFIFG) != 0); // OSCFault flag still
set?
// Set the Master Clock to the Xtal
BCSCTL2 |= SELM1+SELM0; // MCLK = LFXT1 (safe)
I used to have 0xff in the 'for' loop but lengthened it to try
improving the reset.
I have a cmac A169E 3.6864 Mhz xtal and 3.9pF caps to 0v from the xtal
(I used to have 22 pF previously - same problem).
The data sheets reccomends nominally 2pF.
My problem is that when I reset the device it doesn't always return
to normal operation.
It either sits waiting for the oscillator to initialise or it jumps
off into some unused part of memory.
Has anyone come across this and if so do you have any suggestions to
overcome it.
Cheers
Peter
Two observations:
1) you can cause an immediate RESET via the WD
by simply writing 0 to it (invalid WDTPW)
WDTCL = 0;
while (1);
2) ensure that ((IFG1 & OFIFG) == 0) constantly for
at least 255 accesses.
for (IFG1 &= ~OFIFG, delay = 255; delay; )
{
if (IFG1 & OFIFG) // check OSC fault flag
{
// it's set
IFG1 &= ~OFIFG; // clear OSC fault flag
delay = 255; // reset delay count
}
else
--delay; // clear, decrement delay
}
Regards
-Bill Knight
R O SoftWare
On Fri, 27 Feb 2004 15:33:52 -0000, pjascol wrote:
Hi
Can anyone help me. I am using a button press to cause the wdog to
reset my application.
I use
WDTCTL = WDT_ADLY_1000;
IE1 |= WDTIE;
while(1);
I dont relaod the wdog so the device resets.
Then at initialisation I use
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
// Xtal related activity
// Set the ACLK to use the 3.6864MHz Xtal
BCSCTL1 |= XTS; // ACLK = LFXT1 = HF XTAL
// Ensure that the XTAL STARTS UP
do
{
IFG1 &= ~OFIFG; // Clear OSCFault flag
for (i = 0xFFF; i > 0; i--); // Time for flag to set
}
while ((IFG1 & OFIFG) != 0); // OSCFault flag still
set?
// Set the Master Clock to the Xtal
BCSCTL2 |= SELM1+SELM0; // MCLK = LFXT1 (safe)
I used to have 0xff in the 'for' loop but lengthened it to try
improving the reset.
I have a cmac A169E 3.6864 Mhz xtal and 3.9pF caps to 0v from the xtal
(I used to have 22 pF previously - same problem).
The data sheets reccomends nominally 2pF.
My problem is that when I reset the device it doesn't always return
to normal operation.
It either sits waiting for the oscillator to initialise or it jumps
off into some unused part of memory.
Has anyone come across this and if so do you have any suggestions to
overcome it.
Cheers
Peter
.
Yahoo! Groups Links
Reply by pjascol●February 27, 20042004-02-27
Thanks Bill
I put your idea number 2 into action first. I still had the problem.
Then I included suggestion 2 and it appears to have sorted it.
BUT, what is it about
WDTCTL = WDT_ADLY_1000;
that upset it so much that my application would not start up again.
Any suggestions anyone, I'd love to know
Once again, thanks Bill
Cheers
Peter
--- In msp430@msp4..., "Bill Knight" <BillK@r...> wrote:
> Two observations:
> 1) you can cause an immediate RESET via the WD
> by simply writing 0 to it (invalid WDTPW)
>
> WDTCL = 0;
> while (1);
>
> 2) ensure that ((IFG1 & OFIFG) == 0) constantly for
> at least 255 accesses.
>
> for (IFG1 &= ~OFIFG, delay = 255; delay; )
> {
> if (IFG1 & OFIFG) // check OSC fault flag
> {
> // it's set
> IFG1 &= ~OFIFG; // clear OSC fault flag
> delay = 255; // reset delay count
> }
> else
> --delay; // clear, decrement delay
> }
>
> Regards
> -Bill Knight
> R O SoftWare
>
>
>
>
>
> On Fri, 27 Feb 2004 15:33:52 -0000, pjascol wrote:
>
> Hi
>
> Can anyone help me. I am using a button press to cause the wdog to
> reset my application.
> I use
>
> WDTCTL = WDT_ADLY_1000;
> IE1 |= WDTIE;
> while(1);
> I dont relaod the wdog so the device resets.
>
> Then at initialisation I use
>
> WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
>
> // Xtal related activity
> // Set the ACLK to use the 3.6864MHz Xtal
> BCSCTL1 |= XTS; // ACLK = LFXT1 = HF XTAL
> // Ensure that the XTAL STARTS UP
> do
> {
> IFG1 &= ~OFIFG; // Clear OSCFault flag
> for (i = 0xFFF; i > 0; i--); // Time for flag to set
> }
> while ((IFG1 & OFIFG) != 0); // OSCFault flag still
> set?
> // Set the Master Clock to the Xtal
> BCSCTL2 |= SELM1+SELM0; // MCLK = LFXT1 (safe)
>
>
> I used to have 0xff in the 'for' loop but lengthened it to try
> improving the reset.
>
> I have a cmac A169E 3.6864 Mhz xtal and 3.9pF caps to 0v from the
xtal
> (I used to have 22 pF previously - same problem).
> The data sheets reccomends nominally 2pF.
>
> My problem is that when I reset the device it doesn't always return
> to normal operation.
> It either sits waiting for the oscillator to initialise or it jumps
> off into some unused part of memory.
>
> Has anyone come across this and if so do you have any suggestions
to
> overcome it.
>
> Cheers
>
> Peter
>
>
>
>
>
> .
>
>
> Yahoo! Groups Links
Signal Processing Engineer Seeking a DSP Engineer to tackle complex technical challenges. Requires expertise in DSP algorithms, EW, anti-jam, and datalink vulnerability. Qualifications: Bachelor's degree, Secret Clearance, and proficiency in waveform modulation, LPD waveforms, signal detection, MATLAB, algorithm development, RF, data links, and EW systems. The position is on-site in Huntsville, AL and can support candidates at 3+ or 10+ years of experience.