Gene Breniman (@genebren)
Lightweight hardware abstraction
Some lessons are tougher than others to master. You would think that hard fought battles would be easier to remember, but sometimes it just does not work that way. Recently, I was asked to pick-up a project that had been managed by another employee. The project was yet another cost reduction project. The hardware group was tasked with updating a currently shipping product, to reduce the existing failure rate, while at the same time to remove cost from the...
A true pioneer passes away... A farewell to Ritchie.
We all have our heroes. We all have people who were important to our professional developments. For me, Dennis Ritchie was one of those people. I was an early adopter of the C programming language. Back in the very early 80's a friend and neighbor had excitedly shared with me his copy of "The C Programming Language" by Kernighan and Ritchie. At first I was a non-believer. I had for several years been a happy and productive assembly language...
Deeply embedded design example - Logic replacement
I have always believed that some of the low-cost, low-pin count, low-resource microprocessors would make an excellent choice for the replacement of discrete logic components. In these cases the deeply embedded microprocessor would become less of a general purpose computer and more of a logic replacement, providing a prescribed function with no connection to the outside world. In a world of bigger, faster and more expensive, it is a pleasant change of pace...
VHDL tutorial - A practical example - part 3 - VHDL testbench
In part 1 of this series we focused on the hardware design, including some of the VHDL definitions of the I/O characteristics of the CPLD part. In part 2, we described the VHDL logic of the CPLD for this design. In part 3, we will show the entire VHDL design and the associated tests used to prove that we have, in fact, designed what we started out to design.
First, let's pull all of the pieces of the prior design together into a...
VHDL tutorial - A practical example - part 2 - VHDL coding
In part 1 of this series we focused on the hardware design, including some of the VHDL definitions of the I/O characteristics of the CPLD part. In part 2, we will describe the VHDL logic of the CPLD for this design.
With any design, the first step to gather the requirements for the job at hand. From part 1 of this article, I have copied two sections that address some of the requirements for the CPLD design.
The data acquisition engine has the...
VHDL tutorial - A practical example - part 1 - Hardware
In previous posts I described some simple VHDL examples. This time let's try something a little more complex. This is part one of a multiple part article. This is intended to be a detailed description of one of several initial designs that I developed for a client. This design never made it into a product, but a similar design was used and is currently being produced. As a considerable amount of work was put into this effort, I decided to share this design...
Size matters - System success depends on initial design
Too many times during the initial phases of system design, opposing interests start fighting for valuable resources, sometimes without even knowing that they are. Case in point, a development project is starting up with a very simple product. For the user interface, Engineering wants to use a very simple character based LCD display and a couple of membrane switches, while Marketing wants a graphic display with a touch screen. The cost difference between these two items is...
A part of history
This past weekend I had the pleasure of attending the 40-year anniversary celebration of the formation of my high school's radio station (KVHS). The current students and staff of KVHS hosted a birthday party for the radio station and invited former alumni and teachers and the public to share in the celebration. On hand was a pretty good showing of the current and former students and teachers that helped build one of the most successful student-run radio station programs in...
I owe, I owe, so off to work I go.....
The economy hit my start-up plans pretty toughly. My step-daughter and I were working out of a common pool of money (our savings account), and in the end, she won out. She is in her third year at San Jose State and with rising tuition and student housing costs, etc., money was beginning to get a little tight in our savings account. So, I did the right thing, I got a paying job. My initial plan was to find some consulting work to bring in some money, but this...
Software Prototyping
In my recent blog entry on the product development process (way down, near the end of the entry), I wrote the following:
"I continue these sorts of tests, building more and more complexity, until I am satisfied that my circuit is basically functional. Then, using the test code that I have created as a model, I begin to write the real software for my product. As my software grows, to complete the full functionality of my design, I sometime find it useful to drop back to my 'test software'...
Bringing up Baby - product development thoughts
Things have just started to get exciting. After months of defining, specifying and designing my latest product, I finally have semi-functional prototypes. After a few side steps during the building and bring-up process, power is applied and most of the low level functions have been verified. Soon, software will meet hardware and debugging can begin in earnest.
Before jumping in and really enjoying the fun (besides I'm now waiting for some new parts to arrive), I thought it would be nice to...
VHDL tutorial - Creating a hierarchical design
In earlier blog entries I introduced some of the basic VHDL concepts. First, developing a function ('VHDL tutorial') and later verifying and refining it ('VHDL tutorial - part 2 - Testbench' and 'VHDL tutorial - combining clocked and sequential logic'). In this entry I will describe how to...
VHDL tutorial - combining clocked and sequential logic
In an earlier article on VHDL programming ("VHDL tutorial" and "VHDL tutorial - part 2 - Testbench", I described a design for providing a programmable clock divider for a ADC sequencer. In this example, I showed how to generate a clock signal (ADCClk), that was to be programmable over a series of fixed rates (20MHz, 10MHz, 4MHz, 2MHz, 1MHz and 400KHz), given a master clock rate of 40MHz. A reader of that article had written to ask if it was possible to extend the design to...
Small business tackling big jobs.
Greetings and a Happy New Year to all!
I have been extremely busy the last few months tackling a small job that turned into a big job. A few months ago, while working on starting my own company and product line, I answered a job posting for a 'part-time engineer'. The posting specified approximately 10 hours a week assisting another engineer in the completion of a new product development cycle. This sounded like an ideal opportunity to generate a little income for my company while...
Great men in my life.
In my first post on this site (Will work for Tools!), I mentioned how my Grandfather had inspired me to become an Engineer. Today, I write in sadness about the loss of three men, all this year, and the profound effects each of them had on my life and my engineering career. Please allow me to honor each of these men in the order in which I came to know them.
Ron Borrelli, December 1, 1933 to November 3, 2007. Ron, a Co-founder of Zehntel, a manufacturer of automatic test systems (later...
VHDL tutorial - part 2 - Testbench
In an earlier article I walked through the VHDL coding of a simple design. In this article I will continue the process and create a test bench module to test the earlier design. The Xilinx ISE environment makes it pretty easy to start the testing process. To start the process, select "New Source" from the menu items under "Project". This launches the "New Source Wizard". From within the Wizard select "VHDL Test Bench" and enter the name of the new module (click 'Next' to...
VHDL tutorial
When I was first introduced to "Programmable Logic" several years ago, it was an answer to many of the challenges that I was struggling with. Though the parts were primitive by today's standards (simple PALs verses FPGA), they were an extremely cost effective tool addressing the need for specialized logic blocks.
I have continued to incorporate these powerful blocks into many of my latest designs. My current favorite part line is the Xilinx CoolRunner series (XC2Cxxx). In this...
No, I'm not retired!
For many years now, I have been looking for the right opportunity to strike out on my own. At first I had a few ideas that looked promising, but I was not in a position to leave my full-time employment. Being the sole bread winner in the family, or later, being a single parent, the prospect of trading in a guaranteed paycheck for a long shot at future wealth, just didn't seem like a good plan.
This time around, things worked out a better. This time, I had a great idea and enough of a...
Will work for tools!
I have always believed that tools are necessary to the creative process. This is something I learned early in life and it's a lesson that has stuck with me to this day.
When I was 7 years old, I made my first trip to see my Grandparents on my father's side of the family. What I remember most about the trip, besides the great food and the company of my Grandparents, was my Grandfather's shop. My Grandfather had built one of the most amazing shops that I have seen to this day in the...
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