Lost Secrets of the H-Bridge, Part V: Gate Drives for Dummies
Learn the most important issues in power MOSFET and IGBT gate drives: - Transistor behavior during switching - Calculating turn-on and turn-off times - Passive components used between gate drive IC and transistor - Reverse recovery - Capacitively-coupled spurious turn-on - Factors that influence a good choice of turn-on and turn-off times - Gate drive supply voltage management - Bootstrap gate drives - Design issues impacting reliability
Turn It On Again: Modeling Power MOSFET Turn-On Dependence on Source Inductance
This is a short article explaining how to analyze part of the behavior of a power MOSFET during turn-on, and how it is influenced by the parasitic inductance at the source terminal. The brief qualitative reason that source inductance is undesirable is that it uses up voltage when current starts increasing during turn-on (remember, V = L dI/dt), voltage that would otherwise be available to turn the transistor on faster. But I want to show a quantitative approximation to understand the impact of additional source inductance, and I want to compare it to the effects of extra inductance at the gate or drain.
Modeling Gate Drive Diodes
This is a short article about how to analyze the diode in some gate drive circuits when figuring out turn-off characteristics --- specifically, determining the relationship between gate drive current and gate voltage during turn-off of a power transistor.
What is Pulse Width Modulation and How Does It Work?
Pulse Width Modulation (PWM) is a technique used to control the average voltage supplied to a device or component by adjusting the width of a series of pulses. It works by rapidly turning a signal on and off at a specific frequency. The crucial element of PWM is the duty cycle, which represents the percentage of time the signal is “on†(high voltage) compared to the total time of one cycle.
How to Read a Power MOSFET Datasheet
Jason Sachs takes a soapbox to stop a recurring mistake: misreading power MOSFET datasheets. This practical guide separates marketing blurbs and typical graphs from the specifications you can actually rely on, and explains how to use RDS(on), VGS, gate charge, SOA and thermal data in real designs. Read this before you pick a MOSFET or size a gate driver.
Musings on Publication — and Zero Sequence Modulation
Publishing technical content involves more than writing, it requires tools, reviewers, and patience. Jason Sachs walks through his lean workflow for posting to EmbeddedRelated, contrasts it with the multi-person review cycles at semiconductor companies, and points out a neat trick for checking PDF metadata. He also highlights a Microchip tutorial on Zero Sequence Modulation that includes a 3-D HTML5 interactive viewer to make space vector concepts easier to grasp.
Lost Secrets of the H-Bridge, Part IV: DC Link Decoupling and Why Electrolytic Capacitors Are Not Enough
Switching H-bridges can kick nasty voltage spikes onto the DC link, and a single electrolytic capacitor rarely fixes the problem. Jason Sachs uses simulations and practical PCB layout advice to show how a three-tier decoupling strategy — bulk electrolytic, mid-value ceramics or film, and many small HF bypass capacitors plus PCB plane capacitance — tames spikes, reduces EMI, and avoids harmful resonances when parts and vias are placed correctly.
Efficiency Through the Looking-Glass
Efficiency numbers can be misleading, Jason Sachs argues, because they hide the real cost engineers pay in wasted watts. This post flips the focus from percent efficiency to absolute power loss, shows how losses often stay nearly constant across loads, and walks through a practical thermal method to measure those losses more reliably than subtracting input and output power. Read it to rethink how you budget heat and energy in designs.
Lost Secrets of the H-Bridge, Part III: Practical Issues of Inductor and Capacitor Ripple Current
Jason Sachs cuts through the math to show what ripple current actually does to H-bridge hardware. He explains why peak current is the limiting factor for inductors, why capacitor ESR usually dominates DC-link voltage ripple, and how center-aligned PWM and duty selection reduce harmonics and ripple. Read this if you want practical rules of thumb and calculation templates for real power-electronics designs.
Lost Secrets of the H-Bridge, Part II: Ripple Current in the DC Link Capacitor
DC link capacitor ripple often determines capacitor life, yet the H-bridge waveform has a lot more structure than you might expect. Jason Sachs separates capacitor current into ramp and pulse components, derives closed-form peak and RMS expressions for edge and center PWM, and shows harmonic amplitudes. The post includes Python simulation so you can visualize the waveforms and apply the formulas to capacitor selection and EMI analysis.
Lost Secrets of the H-Bridge, Part V: Gate Drives for Dummies
Learn the most important issues in power MOSFET and IGBT gate drives: - Transistor behavior during switching - Calculating turn-on and turn-off times - Passive components used between gate drive IC and transistor - Reverse recovery - Capacitively-coupled spurious turn-on - Factors that influence a good choice of turn-on and turn-off times - Gate drive supply voltage management - Bootstrap gate drives - Design issues impacting reliability
How to Read a Power MOSFET Datasheet
Jason Sachs takes a soapbox to stop a recurring mistake: misreading power MOSFET datasheets. This practical guide separates marketing blurbs and typical graphs from the specifications you can actually rely on, and explains how to use RDS(on), VGS, gate charge, SOA and thermal data in real designs. Read this before you pick a MOSFET or size a gate driver.
Lost Secrets of the H-Bridge, Part II: Ripple Current in the DC Link Capacitor
DC link capacitor ripple often determines capacitor life, yet the H-bridge waveform has a lot more structure than you might expect. Jason Sachs separates capacitor current into ramp and pulse components, derives closed-form peak and RMS expressions for edge and center PWM, and shows harmonic amplitudes. The post includes Python simulation so you can visualize the waveforms and apply the formulas to capacitor selection and EMI analysis.
Lost Secrets of the H-Bridge, Part IV: DC Link Decoupling and Why Electrolytic Capacitors Are Not Enough
Switching H-bridges can kick nasty voltage spikes onto the DC link, and a single electrolytic capacitor rarely fixes the problem. Jason Sachs uses simulations and practical PCB layout advice to show how a three-tier decoupling strategy — bulk electrolytic, mid-value ceramics or film, and many small HF bypass capacitors plus PCB plane capacitance — tames spikes, reduces EMI, and avoids harmful resonances when parts and vias are placed correctly.
What is Pulse Width Modulation and How Does It Work?
Pulse Width Modulation (PWM) is a technique used to control the average voltage supplied to a device or component by adjusting the width of a series of pulses. It works by rapidly turning a signal on and off at a specific frequency. The crucial element of PWM is the duty cycle, which represents the percentage of time the signal is “on†(high voltage) compared to the total time of one cycle.
Lost Secrets of the H-Bridge, Part I: Ripple Current in Inductive Loads
Jason Sachs digs into what PWM switching actually does to current in an H-bridge with an inductive load, and why that ripple matters for motors and power converters. He derives closed-form ripple formulas, shows how to compute a reference current I_R0 = VDC·T/L, and uses Python and sympy to plot and verify results. Read it for practical rules to halve ripple and raise its frequency.
Turn It On Again: Modeling Power MOSFET Turn-On Dependence on Source Inductance
This is a short article explaining how to analyze part of the behavior of a power MOSFET during turn-on, and how it is influenced by the parasitic inductance at the source terminal. The brief qualitative reason that source inductance is undesirable is that it uses up voltage when current starts increasing during turn-on (remember, V = L dI/dt), voltage that would otherwise be available to turn the transistor on faster. But I want to show a quantitative approximation to understand the impact of additional source inductance, and I want to compare it to the effects of extra inductance at the gate or drain.
Modeling Gate Drive Diodes
This is a short article about how to analyze the diode in some gate drive circuits when figuring out turn-off characteristics --- specifically, determining the relationship between gate drive current and gate voltage during turn-off of a power transistor.
Lost Secrets of the H-Bridge, Part III: Practical Issues of Inductor and Capacitor Ripple Current
Jason Sachs cuts through the math to show what ripple current actually does to H-bridge hardware. He explains why peak current is the limiting factor for inductors, why capacitor ESR usually dominates DC-link voltage ripple, and how center-aligned PWM and duty selection reduce harmonics and ripple. Read this if you want practical rules of thumb and calculation templates for real power-electronics designs.
Which MOSFET topology?
Jason Sachs breaks down the four basic MOSFET topologies for switching a two-wire load, showing why low-side N-channel is usually the simplest and cheapest option. He explains why grounding or chassis return can force a high-side switch, how P-channel devices trade performance for simpler gate drive, and why high-side N-channel options need extra driver circuitry. He also stresses adding freewheeling diodes for inductive loads.
How to Read a Power MOSFET Datasheet
Jason Sachs takes a soapbox to stop a recurring mistake: misreading power MOSFET datasheets. This practical guide separates marketing blurbs and typical graphs from the specifications you can actually rely on, and explains how to use RDS(on), VGS, gate charge, SOA and thermal data in real designs. Read this before you pick a MOSFET or size a gate driver.
Lost Secrets of the H-Bridge, Part IV: DC Link Decoupling and Why Electrolytic Capacitors Are Not Enough
Switching H-bridges can kick nasty voltage spikes onto the DC link, and a single electrolytic capacitor rarely fixes the problem. Jason Sachs uses simulations and practical PCB layout advice to show how a three-tier decoupling strategy — bulk electrolytic, mid-value ceramics or film, and many small HF bypass capacitors plus PCB plane capacitance — tames spikes, reduces EMI, and avoids harmful resonances when parts and vias are placed correctly.
Lost Secrets of the H-Bridge, Part V: Gate Drives for Dummies
Learn the most important issues in power MOSFET and IGBT gate drives: - Transistor behavior during switching - Calculating turn-on and turn-off times - Passive components used between gate drive IC and transistor - Reverse recovery - Capacitively-coupled spurious turn-on - Factors that influence a good choice of turn-on and turn-off times - Gate drive supply voltage management - Bootstrap gate drives - Design issues impacting reliability
Which MOSFET topology?
Jason Sachs breaks down the four basic MOSFET topologies for switching a two-wire load, showing why low-side N-channel is usually the simplest and cheapest option. He explains why grounding or chassis return can force a high-side switch, how P-channel devices trade performance for simpler gate drive, and why high-side N-channel options need extra driver circuitry. He also stresses adding freewheeling diodes for inductive loads.
Lost Secrets of the H-Bridge, Part I: Ripple Current in Inductive Loads
Jason Sachs digs into what PWM switching actually does to current in an H-bridge with an inductive load, and why that ripple matters for motors and power converters. He derives closed-form ripple formulas, shows how to compute a reference current I_R0 = VDC·T/L, and uses Python and sympy to plot and verify results. Read it for practical rules to halve ripple and raise its frequency.
Lost Secrets of the H-Bridge, Part III: Practical Issues of Inductor and Capacitor Ripple Current
Jason Sachs cuts through the math to show what ripple current actually does to H-bridge hardware. He explains why peak current is the limiting factor for inductors, why capacitor ESR usually dominates DC-link voltage ripple, and how center-aligned PWM and duty selection reduce harmonics and ripple. Read this if you want practical rules of thumb and calculation templates for real power-electronics designs.
Lost Secrets of the H-Bridge, Part II: Ripple Current in the DC Link Capacitor
DC link capacitor ripple often determines capacitor life, yet the H-bridge waveform has a lot more structure than you might expect. Jason Sachs separates capacitor current into ramp and pulse components, derives closed-form peak and RMS expressions for edge and center PWM, and shows harmonic amplitudes. The post includes Python simulation so you can visualize the waveforms and apply the formulas to capacitor selection and EMI analysis.
Modeling Gate Drive Diodes
This is a short article about how to analyze the diode in some gate drive circuits when figuring out turn-off characteristics --- specifically, determining the relationship between gate drive current and gate voltage during turn-off of a power transistor.
Hot Fun in the Silicon: Thermal Testing with Power Semiconductors
Bringing hundreds of amps into the lab for low-Rds(on) MOSFET thermal tests is impractical. Jason Sachs demonstrates a clever workaround using a zener diode, a series resistor, and a constant-current lab supply to dump the same watts into the device at much lower current. He also explains how to use datasheet RθJC values and type T thermocouples to estimate junction temperature and size heatsinking or airflow.
Efficiency Through the Looking-Glass
Efficiency numbers can be misleading, Jason Sachs argues, because they hide the real cost engineers pay in wasted watts. This post flips the focus from percent efficiency to absolute power loss, shows how losses often stay nearly constant across loads, and walks through a practical thermal method to measure those losses more reliably than subtracting input and output power. Read it to rethink how you budget heat and energy in designs.
