Hi,
I'm stuck with a problem implementing a capture compare on TIMER B.
I have toggled a pin in the ISR and measured the waveform on the
CRO. The ISR triggers as expected after every 50ms , but after some
time (quite random) the timer misfires i.e. i get a shorter duration
pulse.
I have pasted the code below.
Thanx once again for ur help.
Regards,
Lewis
///////////////////////////////////////////////////////////////////
#include <msp430x14x.h>
void
main(void)
{
unsigned int i;
P4DIR |= BIT6;
WDTCTL = WDTPW + WDTHOLD;// Watchdog Timer Control disabled
BCSCTL1 = 0;
BCSCTL2 = SELM1 + SELS;
do
{
IFG1 &= ~OFIFG;
for (i=0xFFFF; i>0; i--);
}
while (IFG1 & OFIFG);
TBCTL = TBSSEL0 + MC0 + TBCLR + TBIE ;
TBCCTL0 = CCIE;
TBCCR0 = 6380;
_EINT();
while(1)
{
}
}
void Timer_B0(void) __interrupt[TIMERB0_VECTOR]
{
TBCCR0 += 6380;
P4OUT ^= BIT6;
}
///////////////////////////////////////////////////////////////////
As well as a capture interrupt you have enabled the TimerB overflow
interrupt.
Replace
TBCTL = TBSSEL0 + MC0 + TBCLR + TBIE ;
with
TBCTL = TBSSEL0 + MC0 + TBCLR;
John Heenan
--- In msp430@msp4..., "lewis" <oldrine@...> wrote:
>
> Hi,
>
> I'm stuck with a problem implementing a capture compare on TIMER B.
> I have toggled a pin in the ISR and measured the waveform on the
> CRO. The ISR triggers as expected after every 50ms , but after
some
> time (quite random) the timer misfires i.e. i get
a shorter
duration
> pulse.
> I have pasted the code below.
>
> Thanx once again for ur help.
>
> Regards,
> Lewis
> ///////////////////////////////////////////////////////////////////
>
> #include <msp430x14x.h>
> void
> main(void)
> {
> unsigned int i;
> P4DIR |= BIT6;
> WDTCTL = WDTPW + WDTHOLD;// Watchdog Timer Control disabled
> BCSCTL1 = 0;
> BCSCTL2 = SELM1 + SELS;
> do
> {
> IFG1 &= ~OFIFG;
> for (i=0xFFFF; i>0; i--);
> }
> while (IFG1 & OFIFG);
> TBCTL = TBSSEL0 + MC0 + TBCLR + TBIE ;
> TBCCTL0 = CCIE;
> TBCCR0 = 6380;
> _EINT();
> while(1)
> {
> }
> }
>
>
> void Timer_B0(void) __interrupt[TIMERB0_VECTOR]
> {
> TBCCR0 += 6380;
> P4OUT ^= BIT6;
> }
> ///////////////////////////////////////////////////////////////////
>
Reply by lewis●April 27, 20062006-04-27
Hi John,
Thnx a lot ! I just tried remooving the TBIE but found that the
timer still misfires. I am using a 8MHz crystal on XT2 and the
regular 32K as crystal 1.The CPU is running at 8Mhz and Timer B is
clocked at 32K from ACLK.
Regards,
Lewis
--- In msp430@msp4..., "John Heenan" <l10@...> wrote:
>
> As well as a capture interrupt you have enabled the TimerB
overflow
> interrupt.
>
> Replace
> TBCTL = TBSSEL0 + MC0 + TBCLR + TBIE ;
> with
> TBCTL = TBSSEL0 + MC0 + TBCLR;
>
> John Heenan
>
>
> --- In msp430@msp4..., "lewis" <oldrine@> wrote:
> >
> > Hi,
> >
> > I'm stuck with a problem implementing a capture compare on TIMER
B.
> > I have toggled a pin in the ISR and measured
the waveform on the
> > CRO. The ISR triggers as expected after every 50ms , but after
> some
> > time (quite random) the timer misfires i.e. i get a shorter
> duration
> > pulse.
> > I have pasted the code below.
> >
> > Thanx once again for ur help.
> >
> > Regards,
> > Lewis
>
> ///////////////////////////////////////////////////////////////////
> >
> > #include <msp430x14x.h>
> > void
> > main(void)
> > {
> > unsigned int i;
> > P4DIR |= BIT6;
> > WDTCTL = WDTPW + WDTHOLD;// Watchdog Timer Control disabled
> > BCSCTL1 = 0;
> > BCSCTL2 = SELM1 + SELS;
> > do
> > {
> > IFG1 &= ~OFIFG;
> > for (i=0xFFFF; i>0; i--);
> > }
> > while (IFG1 & OFIFG);
> > TBCTL = TBSSEL0 + MC0 + TBCLR + TBIE ;
> > TBCCTL0 = CCIE;
> > TBCCR0 = 6380;
> > _EINT();
> > while(1)
> > {
> > }
> > }
> >
> >
> > void Timer_B0(void) __interrupt[TIMERB0_VECTOR]
> > {
> > TBCCR0 += 6380;
> > P4OUT ^= BIT6;
> > }
>
> ///////////////////////////////////////////////////////////////////
> >
>
Reply by Michael Iverson●April 27, 20062006-04-27
Lewis,
You also may want to be running in continuous mode ( MC_2 ).
Cheers,
Michael
-----Original Message-----
From: msp430@msp4... [mailto:msp430@msp4...] On Behalf
Of lewis
Sent: Thursday, April 27, 2006 12:28 PM
To: msp430@msp4...
Subject: [msp430] Re: MSP430 TimerB Capture compare problem
Hi John,
Thnx a lot ! I just tried remooving the TBIE but found that the timer
still misfires. I am using a 8MHz crystal on XT2 and the regular 32K as
crystal 1.The CPU is running at 8Mhz and Timer B is clocked at 32K from
ACLK.
Regards,
Lewis
--- In msp430@msp4..., "John Heenan" <l10@...> wrote:
>
> As well as a capture interrupt you have enabled the TimerB
overflow
> interrupt.
>
> Replace
> TBCTL = TBSSEL0 + MC0 + TBCLR + TBIE ; with
> TBCTL = TBSSEL0 + MC0 + TBCLR;
>
> John Heenan
>
>
> --- In msp430@msp4..., "lewis" <oldrine@> wrote:
> >
> > Hi,
> >
> > I'm stuck with a problem implementing a capture compare on TIMER
B.
> > I have toggled a pin in the ISR and measured
the waveform on the
> > CRO. The ISR triggers as expected after every 50ms , but after
> some
> > time (quite random) the timer misfires i.e. i get a shorter
> duration
> > pulse.
> > I have pasted the code below.
> >
> > Thanx once again for ur help.
> >
> > Regards,
> > Lewis
>
> ///////////////////////////////////////////////////////////////////
> >
> > #include <msp430x14x.h>
> > void
> > main(void)
> > {
> > unsigned int i;
> > P4DIR |= BIT6;
> > WDTCTL = WDTPW + WDTHOLD;// Watchdog Timer Control disabled
> > BCSCTL1 = 0;
> > BCSCTL2 = SELM1 + SELS;
> > do
> > {
> > IFG1 &= ~OFIFG;
> > for (i=0xFFFF; i>0; i--);
> > }
> > while (IFG1 & OFIFG);
> > TBCTL = TBSSEL0 + MC0 + TBCLR + TBIE ;
> > TBCCTL0 = CCIE;
> > TBCCR0 = 6380;
> > _EINT();
> > while(1)
> > {
> > }
> > }
> >
> >
> > void Timer_B0(void) __interrupt[TIMERB0_VECTOR] {
> > TBCCR0 += 6380;
> > P4OUT ^= BIT6;
> > }
>
> ///////////////////////////////////////////////////////////////////
> >
>
.
Yahoo! Groups Links
Reply by lewis●April 27, 20062006-04-27
Hi Michael,
I just configured the timer as suggested and it seems to be wrkin
fine. Thanx a million.
Regards,
Lewis
--- In msp430@msp4..., "Michael Iverson" <miverson@...>
wrote:
>
> Lewis,
>
> You also may want to be running in continuous mode ( MC_2 ).
>
> Cheers,
>
> Michael
>
> -----Original Message-----
> From: msp430@msp4... [mailto:msp430@msp4...] On
Behalf
> Of lewis
> Sent: Thursday, April 27, 2006 12:28 PM
> To: msp430@msp4...
> Subject: [msp430] Re: MSP430 TimerB Capture compare problem
>
> Hi John,
> Thnx a lot ! I just tried remooving the TBIE but found that the
timer
> still misfires. I am using a 8MHz crystal on XT2
and the regular
32K as
> crystal 1.The CPU is running at 8Mhz and Timer B
is clocked at 32K
from
> ACLK.
> Regards,
> Lewis
>
>
> --- In msp430@msp4..., "John Heenan" <l10@> wrote:
> >
> > As well as a capture interrupt you have enabled the TimerB
> overflow
> > interrupt.
> >
> > Replace
> > TBCTL = TBSSEL0 + MC0 + TBCLR + TBIE ; with
> > TBCTL = TBSSEL0 + MC0 + TBCLR;
> >
> > John Heenan
> >
> >
> > --- In msp430@msp4..., "lewis" <oldrine@> wrote:
> > >
> > > Hi,
> > >
> > > I'm stuck with a problem implementing a capture compare on
TIMER
> B.
> > > I have toggled a pin in the ISR and measured the waveform on
the
> > > CRO. The ISR triggers as expected after
every 50ms , but after
> > some
> > > time (quite random) the timer misfires i.e. i get a shorter
> > duration
> > > pulse.
> > > I have pasted the code below.
> > >
> > > Thanx once again for ur help.
> > >
> > > Regards,
> > > Lewis
> >
>
> ///////////////////////////////////////////////////////////////////
> > >
> > > #include <msp430x14x.h>
> > > void
> > > main(void)
> > > {
> > > unsigned int i;
> > > P4DIR |= BIT6;
> > > WDTCTL = WDTPW + WDTHOLD;// Watchdog Timer Control disabled
> > > BCSCTL1 = 0;
> > > BCSCTL2 = SELM1 + SELS;
> > > do
> > > {
> > > IFG1 &= ~OFIFG;
> > > for (i=0xFFFF; i>0; i--);
> > > }
> > > while (IFG1 & OFIFG);
> > > TBCTL = TBSSEL0 + MC0 + TBCLR + TBIE ;
> > > TBCCTL0 = CCIE;
> > > TBCCR0 = 6380;
> > > _EINT();
> > > while(1)
> > > {
> > > }
> > > }
> > >
> > >
> > > void Timer_B0(void) __interrupt[TIMERB0_VECTOR] {
> > > TBCCR0 += 6380;
> > > P4OUT ^= BIT6;
> > > }
> >
>
> ///////////////////////////////////////////////////////////////////
> > >
> >
>
>
>
>
>
>
> .
>
>
> Yahoo! Groups Links
>
Reply by Adriano Caye●May 2, 20062006-05-02
Your problem seems to be that you increment TBCCR0 in the ISR. I suggest
you to try NOT to increment TBCCR0 inside the ISR, let it unchanged. I
think that the shorter pulse happens when TBCCR0 overflows, because in
this situation it would have a smaller value.
Regards,
Adriano.
lewis wrote:
> Hi John,
> Thnx a lot ! I just tried remooving the TBIE but found that the
> timer still misfires. I am using a 8MHz crystal on XT2 and the
> regular 32K as crystal 1.The CPU is running at 8Mhz and Timer B is
> clocked at 32K from ACLK.
> Regards,
> Lewis
>
>
> --- In msp430@msp4..., "John Heenan" <l10@...> wrote:
>
>>As well as a capture interrupt you have enabled the TimerB
>
> overflow
>
>>interrupt.
>>
>>Replace
>> TBCTL = TBSSEL0 + MC0 + TBCLR + TBIE ;
>>with
>> TBCTL = TBSSEL0 + MC0 + TBCLR;
>>
>>John Heenan
>>
>>
>>--- In msp430@msp4..., "lewis" <oldrine@> wrote:
>>
>>>Hi,
>>>
>>>I'm stuck with a problem implementing a capture compare on
TIMER
>
> B.
>
>>>I have toggled a pin in the ISR and measured the waveform on the
>>>CRO. The ISR triggers as expected after every 50ms , but after
>>
>>some
>>
>>>time (quite random) the timer misfires i.e. i get a shorter
>>
>>duration
>>
>>>pulse.
>>>I have pasted the code below.
>>>
>>>Thanx once again for ur help.
>>>
>>>Regards,
>>>Lewis
>>
>>///////////////////////////////////////////////////////////////////
>>
>>> #include <msp430x14x.h>
>>>void
>>>main(void)
>>>{
>>> unsigned int i;
>>> P4DIR |= BIT6;
>>> WDTCTL = WDTPW + WDTHOLD;// Watchdog Timer Control disabled
>>> BCSCTL1 = 0;
>>> BCSCTL2 = SELM1 + SELS;
>>> do
>>> {
>>> IFG1 &= ~OFIFG;
>>> for (i=0xFFFF; i>0; i--);
>>> }
>>> while (IFG1 & OFIFG);
>>> TBCTL = TBSSEL0 + MC0 + TBCLR + TBIE ;
>>> TBCCTL0 = CCIE;
>>> TBCCR0 = 6380;
>>> _EINT();
>>> while(1)
>>> {
>>> }
>>>}
>>>
>>>
>>>void Timer_B0(void) __interrupt[TIMERB0_VECTOR]
>>>{
>>> TBCCR0 += 6380;
>>> P4OUT ^= BIT6;
>>>}
>>
>>///////////////////////////////////////////////////////////////////
>>
>
>
>
>
>
>
> .
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
Signal Processing Engineer Seeking a DSP Engineer to tackle complex technical challenges. Requires expertise in DSP algorithms, EW, anti-jam, and datalink vulnerability. Qualifications: Bachelor's degree, Secret Clearance, and proficiency in waveform modulation, LPD waveforms, signal detection, MATLAB, algorithm development, RF, data links, and EW systems. The position is on-site in Huntsville, AL and can support candidates at 3+ or 10+ years of experience.