Can anyone please help me? I'm having a rather difficult time implementing a UART Transmit at 9600 Baud. I have been trying to modify the APP NOTE that waits for a character to be received and then echos that character. I just want to write an ASCII character to the UART. I am using port 1.2 for my output and I don't know if thats complicating matters or not. Any code snippet would be greatly appreciated. Thanks!
MSP430F413 UART TX ONLY
Started by ●July 29, 2005
Reply by ●July 29, 20052005-07-29
Send your routine, and also the type of MSP you're using..
On Friday 29 July 2005 9:39 am, neptunetg wrote:
> Can anyone please help me? I'm having a rather difficult time
> implementing a UART Transmit at 9600 Baud. I have been trying to
> modify the APP NOTE that waits for a character to be received and then
> echos that character. I just want to write an ASCII character to the
> UART. I am using port 1.2 for my output and I don't know if thats
> complicating matters or not. Any code snippet would be greatly
> appreciated.
>
> Thanks!
>
>
>
>
>
>
> .
>
>
>
>
>
>
> SPONSORED LINKS
> Msp430 Texas instruments Hardware
>
>
> .
Reply by ●July 29, 20052005-07-29
The demo code is below. I'm using a MSP430F413. This demo is
available on TI's website. The header describes exactly what it
does. All I need is the transmit portion of this code, but I'm
having a pickle of a time getting it extracted and modified. My
transmit port is P1.2 . Basically, I want to put an 8 bit value in
what they are calling RXTXData, call the routine and send it out the
port 1.2 at 9600 baud. Thanks for replying.
Nate
;********************************************************************
**********
; MSP-FET430P410 Demo - Timer_A, UART 9600 Echo, DCO SMCLK
;
; Description: Use Timer_A CCR0 hardware output modes and SCCI
data latch to
; implement UART function @ 9600 baud. Software does not directly
read and
; write to RX and TX pins, instead proper use of output modes and
SCCI data
; latch are demonstrated. Using these hardware features eliminates
ISR
; latency effects as hardware ensures that input and output bit
latching and
; timing are perfectly synchronised with Timer_A regardless of
other
; software activity. In the Mainloop the UART function readies the
UART to
; receive one character and waits in LPM0 with all activity
interrupt driven.
; After a character has been received, the UART receive function
forces exit
; from LPM0 in the Mainloop which echo's back the received
character.
; ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK 1048576Hz
; //* An external watch crystal between XIN & XOUT is required for
ACLK *//
;
; MSP430F413
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.0/CCI0A/TX|-------->
; | | 9600 8N1
; | P1.1/CCI0B/RX|<--------
;
; M. Buccini
; Texas Instruments Inc.
; Feb 2005
; Built with IAR Embedded Workbench Version: 3.21A
;********************************************************************
**********
#include <msp430x41x.h>
; CPU Registers Used
#define RXTXData R4
#define BitCnt R5
;
RXD EQU 002h ; RXD on P1.1
TXD EQU 001h ; TXD on P1.0
;
; Conditions for 9600 Baud SW UART, SMCLK = 1048576
Bitime_5 EQU 0055 ; ~ 0.5 bit length
Bitime EQU 0109 ; ~ 9620 baud
;
;--------------------------------
----------
ORG 0E000h ;
;--------------------------------
----------
RESET mov.w #300h,SP ; Initialize stackpointer
SetupWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop Watchdog Timer
SetupFLL bis.b #XCAP14PF,&FLL_CTL0 ; Configure load caps
SetupTA mov.w #TASSEL1+MC1,&TACTL ; SMCLK, continous mode
SetupC0 mov.w #OUT,&CCTL0 ; TXD Idle as Mark
SetupP1_2 bis.b #TXD+RXD,&P1SEL ; P1.0/1 TA0 for TXD/RXD
function
bis.b #TXD,&P1DIR ; TXD output on P1
eint ; Enable general
interrupts
;
Mainloop call #RX_Ready ; UART ready to RX one
Byte
bis.w #LPM0,SR ; Enter LPM0 Until Byte
RXed
call #TX_Byte ; TX Back RXed Byte
Received
jmp Mainloop ;
;
;--------------------------------
----------
TX_Byte ; Subroutine Transmits Character from RXTXData Buffer
;--------------------------------
----------
mov.w &TAR,&CCR0 ; Current state of TA
counter
add.w #Bitime,&CCR0 ; Some time till first
bit
bis.w #0100h, RXTXData ; Add mark stop bit to
RXTXData
rla.w RXTXData ; Add space start bit
mov.w #10,BitCnt ; Load Bit counter,
8data + ST/SP
mov.w #OUTMOD0+CCIE,&CCTL0 ; TXD = mark = idle
TX_Wait bit.w #CCIE,&CCTL0 ; Wait for TX completion
jnz TX_Wait ;
ret ;
;
;--------------------------------
----------
RX_Ready ; Subroutine Readies UART to Receive Character into
RXTXData Buffer
;--------------------------------
----------
mov.w #08,BitCnt ; Load Bit Counter, 8
data bits
SetupRX mov.w
#SCS+CCIS0+OUTMOD0+CM1+CAP+CCIE,&CCTL0 ;
Sync,Neg Edge,cap
ret ;
;
;--------------------------------
----------
TA0_ISR ; RXTXData Buffer holds UART Data
;--------------------------------
----------
add.w #Bitime,&CCR0 ; Time to next bit
bit.w #CCIS0,&CCTL0 ; RX on CCI0B?
jnz UART_RX ; Jump --> RX
UART_TX cmp.w #00h,BitCnt ;
jne TX_Next ; Next bit?
bic.w #CCIE,&CCTL0 ; All Bits TX or RX,
Disable Int.
reti ;
TX_Next bic.w #OUTMOD2,&CCTL0 ; TX Mark
rra.w RXTXData ; LSB is shifted to carry
jc TX_Test ; Jump --> bit = 1
TX_Space bis.w #OUTMOD2,&CCTL0 ; TX Space
TX_Test dec.w BitCnt ; All bits sent (or
received)?
reti ;
;
UART_RX bit.w #CAP,&CCTL0 ; Capture mode = start
bit edge
jz RX_Bit ; Start bit edge?
RX_Edge bic.w #CAP,&CCTL0 ; Switch to compare mode
add.w #Bitime_5,&CCR0 ; First databit 1.5 bits
from edge
reti ;
RX_Bit bit.w #SCCI,&CCTL0 ; Get bit waiting in
receive latch
rrc.b RXTXData ; Store received bit
RX_Test dec.w BitCnt ; All bits RXed?
jnz RX_Next ; Next bit?
;>>>>>>>>>> Decode of Received Byte Here
<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
RX_Comp bic.w #CCIE,&CCTL0 ; All bits RXed, disable
interrupt
mov.w #GIE,0(SP) ; Decode byte = active
in Mainloop
;>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>><<<<<<<<<<<<<<<<<<<<<<<<<<<<
<<<<<<<<<
RX_Next reti ;
;
;--------------------------------
----------
; Interrupt Vectors
;--------------------------------
----------
ORG 0FFFEh ; RESET Vector
DW RESET ;
ORG 0FFECh ; Timer_A0 Vector
DW TA0_ISR ;
Reply by ●July 29, 20052005-07-29
I solved my own problem. Thanks Micah for helping. Nate --- In msp430@msp4..., "neptunetg" <neptunetg@y...> wrote: > The demo code is below. I'm using a MSP430F413. This demo is > available on TI's website. The header describes exactly what it > does. All I need is the transmit portion of this code, but I'm > having a pickle of a time getting it extracted and modified. My > transmit port is P1.2 . Basically, I want to put an 8 bit value in > what they are calling RXTXData, call the routine and send it out the > port 1.2 at 9600 baud. Thanks for replying. > > Nate > > ;****************************************************************** ** > ********** > ; MSP-FET430P410 Demo - Timer_A, UART 9600 Echo, DCO SMCLK > ; > ; Description: Use Timer_A CCR0 hardware output modes and SCCI > data latch to > ; implement UART function @ 9600 baud. Software does not directly > read and > ; write to RX and TX pins, instead proper use of output modes and > SCCI data > ; latch are demonstrated. Using these hardware features eliminates > ISR > ; latency effects as hardware ensures that input and output bit > latching and > ; timing are perfectly synchronised with Timer_A regardless of > other > ; software activity. In the Mainloop the UART function readies the > UART to > ; receive one character and waits in LPM0 with all activity > interrupt driven. > ; After a character has been received, the UART receive function > forces exit > ; from LPM0 in the Mainloop which echo's back the received > character. > ; ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK > 1048576Hz > ; //* An external watch crystal between XIN & XOUT is required for > ACLK *// > ; > ; MSP430F413 > ; ----------------- > ; /|\| XIN|- > ; | | | 32kHz > ; --|RST XOUT|- > ; | | > ; | P1.0/CCI0A/TX|--------> > ; | | 9600 8N1 > ; | P1.1/CCI0B/RX|<-------- > ; > ; M. Buccini > ; Texas Instruments Inc. > ; Feb 2005 > ; Built with IAR Embedded Workbench Version: 3.21A > ;****************************************************************** ** > ********** > #include <msp430x41x.h> > > ; CPU Registers Used > #define RXTXData R4 > #define BitCnt R5 > ; > RXD EQU 002h ; RXD on P1.1 > TXD EQU 001h ; TXD on P1.0 > ; > ; Conditions for 9600 Baud SW UART, SMCLK = 1048576 > Bitime_5 EQU 0055 ; ~ 0.5 bit length > Bitime EQU 0109 ; ~ 9620 baud > ; > ;------------------------------ -- > ---------- > ORG 0E000h ; > ;------------------------------ -- > ---------- > RESET mov.w #300h,SP ; Initialize stackpointer > SetupWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop Watchdog Timer > SetupFLL bis.b #XCAP14PF,&FLL_CTL0 ; Configure load caps > SetupTA mov.w #TASSEL1+MC1,&TACTL ; SMCLK, continous mode > SetupC0 mov.w #OUT,&CCTL0 ; TXD Idle as Mark > SetupP1_2 bis.b #TXD+RXD,&P1SEL ; P1.0/1 TA0 for TXD/RXD > function > bis.b #TXD,&P1DIR ; TXD output on P1 > eint ; Enable general > interrupts > ; > Mainloop call #RX_Ready ; UART ready to RX one > Byte > bis.w #LPM0,SR ; Enter LPM0 Until Byte > RXed > call #TX_Byte ; TX Back RXed Byte > Received > jmp Mainloop ; > ; > ;------------------------------ -- > ---------- > TX_Byte ; Subroutine Transmits Character from RXTXData Buffer > ;------------------------------ -- > ---------- > mov.w &TAR,&CCR0 ; Current state of TA > counter > add.w #Bitime,&CCR0 ; Some time till first > bit > bis.w #0100h, RXTXData ; Add mark stop bit to > RXTXData > rla.w RXTXData ; Add space start bit > mov.w #10,BitCnt ; Load Bit counter, > 8data + ST/SP > mov.w #OUTMOD0+CCIE,&CCTL0 ; TXD = mark = idle > TX_Wait bit.w #CCIE,&CCTL0 ; Wait for TX completion > jnz TX_Wait ; > ret ; > ; > ;------------------------------ -- > ---------- > RX_Ready ; Subroutine Readies UART to Receive Character into > RXTXData Buffer > ;------------------------------ -- > ---------- > mov.w #08,BitCnt ; Load Bit Counter, 8 > data bits > SetupRX mov.w #SCS+CCIS0+OUTMOD0+CM1+CAP+CCIE,&CCTL0 ; > Sync,Neg Edge,cap > ret ; > ; > ;------------------------------ -- > ---------- > TA0_ISR ; RXTXData Buffer holds UART Data > ;------------------------------ -- > ---------- > add.w #Bitime,&CCR0 ; Time to next bit > bit.w #CCIS0,&CCTL0 ; RX on CCI0B? > jnz UART_RX ; Jump --> RX > UART_TX cmp.w #00h,BitCnt ; > jne TX_Next ; Next bit? > bic.w #CCIE,&CCTL0 ; All Bits TX or RX, > Disable Int. > reti ; > TX_Next bic.w #OUTMOD2,&CCTL0 ; TX Mark > rra.w RXTXData ; LSB is shifted to carry > jc TX_Test ; Jump --> bit = 1 > TX_Space bis.w #OUTMOD2,&CCTL0 ; TX Space > TX_Test dec.w BitCnt ; All bits sent (or > received)? > reti ; > ; > UART_RX bit.w #CAP,&CCTL0 ; Capture mode = start > bit edge > jz RX_Bit ; Start bit edge? > RX_Edge bic.w #CAP,&CCTL0 ; Switch to compare mode > add.w #Bitime_5,&CCR0 ; First databit 1.5 bits > from edge > reti ; > RX_Bit bit.w #SCCI,&CCTL0 ; Get bit waiting in > receive latch > rrc.b RXTXData ; Store received bit > RX_Test dec.w BitCnt ; All bits RXed? > jnz RX_Next ; Next bit? > ;>>>>>>>>>> Decode of Received Byte Here > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< > RX_Comp bic.w #CCIE,&CCTL0 ; All bits RXed, disable > interrupt > mov.w #GIE,0(SP) ; Decode byte = active > in Mainloop > ;>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>><<<<<<<<<<<<<<<<<<<<<<<<<< << > <<<<<<<<< > RX_Next reti ; > ; > ;------------------------------ -- > ---------- > ; Interrupt Vectors > ;------------------------------ -- > ---------- > ORG 0FFFEh ; RESET Vector > DW RESET ; > ORG 0FFECh ; Timer_A0 Vector > DW TA0_ISR ;
