> As I said earlier, it's possible I somehow have a bad part, so if
> someone else could confirm this, that would be helpful?  If what I've
> measured is generally true, the Philips data is wrong and that's
> really disturbing for such a critical parameter.  The power
> consumption listed is also wrong (30ma at 60Mhz is really 44ma but
> that's already been discussed).  At 75Mhz, my 2106 draws 58ma.

The Philips data is correct, I've used the timers enough with different

PLL settings, and the figures were always correct.

As Robert pointed out, at that phase of testing you most likely had

your Fcco out of its range.

 

Think of the cco as a VCO in a PLL.

The VCO has a particular range, and if you eg. divide the VCO output

by 10, and feed that into a phase comparator, with eg a 10 MHz reference

then - if VCO is capable of that - the PLL will phase lock it to 100 MHz.

(This is presuming that the loopfilter is correct, damping factor, VCO gain,

phase margin etc are all appropriate of coyrse).

If you were to set the divider in this example for 20, and the VCO can only

tune up to, say, 130 MHz, then the PLL will remain unlocked, and the VCO will

be free running at around ~ 130 MHz.

 

Something similar to that is happening on the LPC2106, but I suspect that the

high integration of cco and PLL + dividers causes it to go apeshit when you incorrectly

program it, which is a fair equation.

 

B rgds

Kris