Router/packet classifier hardware design

I am investigating possible hardware implementation of a router/packet
classifier in ASIC/FPGA. Where can I find the relevant information to start
with.

	   
					
---------------------------------------		
Posted through http://www.EmbeddedRelated.com

> I am investigating possible hardware implementation of a router/packet
> classifier in ASIC/FPGA. Where can I find the relevant information to start
> with.

<http://www.ietf.org/rfc.html>, assuming you mean a TCP/IP based router.

	Andrew