(So far, 2 people got it right out of 10 for a success rate of 20%)
Let’s say I want to make a switchable reference that takes a 1.25V reference voltage and either buffers it or multiplies it by a gain of 2. I have three ideas of circuits that will do this:
In all cases, I have a CMOS op-amp, and resistors R1 = R2 = 10KΩ. In designs A and B, I have a Nexperia 74LVC1G66 single-pole single-throw (SPST) analog switch for S1; in design C I have a Nexperia 74LVC1G53 single-pole double-throw (SPDT) analog multiplexer.
I want this design to work over a temperature range of -40 to +85°C. Which of the designs will give me the smallest worst-case error in the output Vo?
- Comments
- Write a Comment Select to add a comment
To post reply to a comment, click on the 'reply' button attached to each comment. To post a new comment (not a reply to a comment) check out the 'Write a Comment' tab at the top of the comments.
Please login (on the right) if you already have an account on this platform.
Otherwise, please use this form to register (free) an join one of the largest online community for Electrical/Embedded/DSP/FPGA/ML engineers:
