EmbeddedRelated.com

FPGA

Category: Architecture | Also known as: field-programmable gate array

An FPGA (field-programmable gate array) is an integrated circuit containing a large array of configurable logic blocks, programmable interconnects, and dedicated hardware resources (such as block RAM, DSP slices, and PLLs) that can be wired together after manufacture to implement a very wide range of digital logic designs, subject to available resources, timing, and I/O constraints. Unlike a microcontroller or microprocessor, the FPGA fabric does not execute instructions sequentially; instead, it is configured to become the hardware itself -- though many FPGA designs also include soft processor cores that do execute instructions sequentially alongside the custom logic.

In practice

FPGAs are used in embedded systems when an MCU cannot meet requirements for raw parallelism, deterministic timing, or custom I/O protocols. Common applications include high-speed signal processing, motor control with tight loop timing, custom communication interfaces (e.g., implementing a non-standard serial protocol at hundreds of MHz), software-defined radio, and video/image processing pipelines. On many modern FPGAs from Xilinx (now AMD) and Intel (formerly Altera), hard processor cores (ARM Cortex-A or Cortex-R) are integrated alongside the programmable fabric, enabling hybrid designs that combine firmware running on an MCU-like core with custom logic in the fabric.

Designs for FPGAs are most commonly written in a hardware description language (HDL) such as VHDL or SystemVerilog, or through high-level synthesis (HLS) tools that compile C/C++ into HDL. This is a fundamental shift from MCU firmware development: you are describing concurrent hardware behavior, not writing a sequential program. The blog posts "Jumping from MCUs to FPGAs - 5 things you need to know" and "Three more things you need to know when transitioning from MCUs to FPGAs" cover this mindset shift in detail.

A key practical concern is the FPGA configuration bitstream. Most FPGAs are SRAM-based and lose their configuration on power-off, so an external non-volatile memory is used to store the bitstream and reload it at startup; SPI NOR flash is common, but some devices boot from other non-volatile sources or are configured through a host processor. Antifuse FPGAs are one-time programmable and retain configuration without external memory; flash-based FPGAs (such as Microchip's IGLOO and PolarFire families) are also non-volatile and, unlike antifuse, are typically reprogrammable many times.

Resource constraints are a constant factor in FPGA development. Logic utilization, routing congestion, block RAM availability, and timing closure (meeting setup and hold requirements across the design at the target clock frequency) all require active management. Timing failures are among the most common problems for developers new to FPGA design, and they do not always manifest as obvious functional bugs, making them harder to catch than typical software bugs.

Discussed on EmbeddedRelated

Frequently asked

What is the difference between an FPGA and a microcontroller?
A microcontroller has a fixed CPU core, peripherals, and memory; it executes firmware as a sequence of instructions. An FPGA has no fixed architecture -- you configure it to instantiate the logic structures you need, which all operate in parallel. An FPGA can implement an MCU-equivalent soft core (e.g., RISC-V, MicroBlaze, Nios II) as one component among many, but the underlying execution model is hardware concurrency, not instruction sequencing.
Do I need to know VHDL or Verilog to use an FPGA?
For most non-trivial designs, yes. HDL fluency in VHDL or SystemVerilog is the standard skill required. High-level synthesis tools (Xilinx Vitis HLS, Intel oneAPI HLS) can generate HDL from C/C++ for certain compute kernels, but they still require understanding of hardware concepts like pipelining and resource sharing. Schematic-entry tools exist but are rarely used for large designs. 'FPGA skills for the modern world' and 'Mastering Modern FPGA Skills for Engineers' discuss where the toolchain is heading.
How is an FPGA programmed or configured?
The design is written in HDL, synthesized into a netlist, placed and routed by vendor tools (Vivado for AMD/Xilinx, Quartus for Intel/Altera, Libero for Microchip), and compiled into a bitstream. For SRAM-based FPGAs -- the most common type -- the bitstream is loaded via JTAG during development or from external flash at boot. The configuration is volatile and must be reloaded every power cycle unless a non-volatile configuration device or architecture is used.
Can an FPGA replace a microcontroller?
It can, but it is rarely the right trade-off for tasks that fit comfortably on an MCU. FPGAs generally cost more per unit in most volume tiers and require significantly more development effort; static power consumption also tends to be higher, though this varies considerably by family and use case and some modern low-power FPGAs are more competitive. They are the appropriate choice when you need massive parallelism, sub-nanosecond I/O timing control, or a custom hardware architecture that no available MCU or ASIC provides. Many production systems use both: an MCU or application processor for control logic and an FPGA for high-speed data paths.
What are typical FPGA vendors and families used in embedded systems?
AMD (formerly Xilinx) and Intel (formerly Altera) are among the largest vendors in the embedded FPGA space. Common families include AMD Artix-7, Zynq-7000 (ARM Cortex-A9 + fabric), and Zynq UltraScale+ (Cortex-A53/R5 + fabric); Intel Cyclone and MAX 10 series for cost-sensitive applications; and Microchip (formerly Actel/Microsemi) PolarFire and IGLOO2 families, which are notable for low power and radiation tolerance. Lattice Semiconductor's ECP5 and iCE40 families are popular in open-source toolchain communities and space-constrained designs.

Differentiators vs similar concepts

An FPGA is often contrasted with a CPLD (complex programmable logic device). CPLDs typically have simpler, non-volatile architectures with smaller logic capacity and predictable, flat routing delays -- making them suitable for glue logic and power-on sequencing. FPGAs offer far greater logic density and, depending on the device class, may also include embedded memory blocks, DSP slices, and high-speed transceivers; however, these resources vary significantly across FPGA families and are not universally present. Most SRAM-based FPGAs require external configuration storage and have more complex timing models. FPGAs are also distinct from ASICs (application-specific integrated circuits): an ASIC is permanently fabricated for a fixed function, offers better performance-per-watt and lower per-unit cost at high volumes, but requires significant NRE (non-recurring engineering) cost and a long design-to-silicon cycle. FPGAs are reprogrammable and reach market far faster.