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Discussion Groups | Comp.Arch.Embedded | 40 core embeddified processor
There are 23 messages in this thread.
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40 core embeddified processor - Martin Griffith - 13:40 25-09-08
hmmm http://ddj.com/hpc-high-performance-computing/210603583;jsessionid=MJC0UM1XWMCQOQSNDLOSKHSCJUNN2JVN martin
Re: 40 core embeddified processor - Wilco Dijkstra - 15:57 25-09-08
"Martin Griffith" <m...@yah00.es> wrote in message news:m...@4ax.com... > > hmmm > http://ddj.com/hpc-high-performance-computing/210603583;jsessionid=MJC0UM1XWMCQOQSNDLOSKHSCJUNN2JVN Definitely deserves a price for the wackiest microprocessor. You need a nop after every addition, there is no subtract (just figure out how to do it using xor and add), 16x16 multiply takes 40 instructions, only supports Forth... Wilco
Re: 40 core embeddified processor - Jim Stewart - 17:11 25-09-08
Wilco Dijkstra wrote: > "Martin Griffith" <m...@yah00.es> wrote in message news:m...@4ax.com... >> hmmm >> http://ddj.com/hpc-high-performance-computing/210603583;jsessionid=MJC0UM1XWMCQOQSNDLOSKHSCJUNN2JVN > > Definitely deserves a price for the wackiest microprocessor. You need a nop > after every addition, there is no subtract (just figure out how to do it using xor > and add), 16x16 multiply takes 40 instructions, only supports Forth... Sorta like an ILLIAC IV on a chip.
Re: 40 core embeddified processor - Martin Griffith - 18:13 25-09-08
On Thu, 25 Sep 2008 20:57:09 +0100, in comp.arch.embedded "Wilco Dijkstra" <W...@ntlworld.com> wrote: > >"Martin Griffith" <m...@yah00.es> wrote in message news:m...@4ax.com... >> >> hmmm >> http://ddj.com/hpc-high-performance-computing/210603583;jsessionid=MJC0UM1XWMCQOQSNDLOSKHSCJUNN2JVN > >Definitely deserves a price for the wackiest microprocessor. You need a nop >after every addition, there is no subtract (just figure out how to do it using xor >and add), 16x16 multiply takes 40 instructions, only supports Forth... > >Wilco > I'm really out of my depth on this sort of thing, and was just wondering what the pro's here think. That's why I put a "hmmm" in my OP. I wonder what the dev system is like, nope, can't be bothered to D/L it martin
Re: 40 core embeddified processor - Walter Banks - 18:20 25-09-08
More like ILLIAC XL w.. Jim Stewart wrote: > Wilco Dijkstra wrote: > > "Martin Griffith" <m...@yah00.es> wrote in message news:m...@4ax.com... > >> hmmm > >> http://ddj.com/hpc-high-performance-computing/210603583;jsessionid=MJC0UM1XWMCQOQSNDLOSKHSCJUNN2JVN > > > > Definitely deserves a price for the wackiest microprocessor. You need a nop > > after every addition, there is no subtract (just figure out how to do it using xor > > and add), 16x16 multiply takes 40 instructions, only supports Forth... > > Sorta like an ILLIAC IV on a chip.
Re: 40 core embeddified processor - Walter Banks - 09:34 26-09-08
Martin Griffith wrote: > On Thu, 25 Sep 2008 20:57:09 +0100, in comp.arch.embedded "Wilco > Dijkstra" <W...@ntlworld.com> wrote: > > > > >"Martin Griffith" <m...@yah00.es> wrote in message news:m...@4ax.com... > >> > >> hmmm > >> http://ddj.com/hpc-high-performance-computing/210603583;jsessionid=MJC0UM1XWMCQOQSNDLOSKHSCJUNN2JVN > > > >Definitely deserves a price for the wackiest microprocessor. You need a nop > >after every addition, there is no subtract (just figure out how to do it using xor > >and add), 16x16 multiply takes 40 instructions, only supports Forth... > > > >Wilco > > > I'm really out of my depth on this sort of thing, and was just > wondering what the pro's here think. > That's why I put a "hmmm" in my OP. > I wonder what the dev system is like, nope, can't be bothered to D/L > it Martin It is a weak instruction set. 64 words of ram and rom per processor is strange. It isn't clear (to me) if the RAM is also the stacks. The total ROM is 2560 for 40 processors which limits the size of applications that can be described (I know instructions are packed offset some by packing and execution order limits). The web site doesn't make a compelling case for applications that could effectively use this processor. Compare this processor with the parallax Propellor for example. The parallax processor is far more flexible Walter..
Re: 40 core embeddified processor - Martin Griffith - 10:47 26-09-08
On Fri, 26 Sep 2008 09:34:57 -0400, in comp.arch.embedded Walter Banks <w...@bytecraft.com> wrote: > > >Martin Griffith wrote: > >> On Thu, 25 Sep 2008 20:57:09 +0100, in comp.arch.embedded "Wilco >> Dijkstra" <W...@ntlworld.com> wrote: >> >> > >> >"Martin Griffith" <m...@yah00.es> wrote in message news:m...@4ax.com... >> >> >> >> hmmm >> >> http://ddj.com/hpc-high-performance-computing/210603583;jsessionid=MJC0UM1XWMCQOQSNDLOSKHSCJUNN2JVN >> > >> >Definitely deserves a price for the wackiest microprocessor. You need a nop >> >after every addition, there is no subtract (just figure out how to do it using xor >> >and add), 16x16 multiply takes 40 instructions, only supports Forth... >> > >> >Wilco >> > >> I'm really out of my depth on this sort of thing, and was just >> wondering what the pro's here think. >> That's why I put a "hmmm" in my OP. >> I wonder what the dev system is like, nope, can't be bothered to D/L >> it > >Martin > >It is a weak instruction set. 64 words of ram and rom per processor >is strange. It isn't clear (to me) if the RAM is also the stacks. The >total ROM is 2560 for 40 processors which limits the size of >applications that can be described (I know instructions are packed >offset some by packing and execution order limits). > >The web site doesn't make a compelling case for applications that >could effectively use this processor. Compare this processor with >the parallax Propellor for example. The parallax processor is far >more flexible > >Walter.. Thanks for the parallax Propellor pointer, it will give me another chance of improving my incompetance again :) It looks fun martin
Re: 40 core embeddified processor - Alex Colvin - 17:22 26-09-08
>>> >> http://ddj.com/hpc-high-performance-computing/210603583;jsessionid=MJC0UM1XWMCQOQSNDLOSKHSCJUNN2JVN See also http://www.design-reuse.com/news/19119/multicore-processor.html 64 cores with 64k cache each, -- mac the naïf
Re: 40 core embeddified processor - Wilco Dijkstra - 19:47 26-09-08
"Walter Banks" <w...@bytecraft.com> wrote in message news:4...@bytecraft.com... > > > Martin Griffith wrote: > >> On Thu, 25 Sep 2008 20:57:09 +0100, in comp.arch.embedded "Wilco >> Dijkstra" <W...@ntlworld.com> wrote: >> >> > >> >"Martin Griffith" <m...@yah00.es> wrote in message news:m...@4ax.com... >> >> >> >> hmmm >> >> http://ddj.com/hpc-high-performance-computing/210603583;jsessionid=MJC0UM1XWMCQOQSNDLOSKHSCJUNN2JVN >> > >> >Definitely deserves a price for the wackiest microprocessor. You need a nop >> >after every addition, there is no subtract (just figure out how to do it using xor >> >and add), 16x16 multiply takes 40 instructions, only supports Forth... >> > >> >Wilco >> > >> I'm really out of my depth on this sort of thing, and was just >> wondering what the pro's here think. >> That's why I put a "hmmm" in my OP. >> I wonder what the dev system is like, nope, can't be bothered to D/L >> it > > Martin > > It is a weak instruction set. 64 words of ram and rom per processor > is strange. It isn't clear (to me) if the RAM is also the stacks. The > total ROM is 2560 for 40 processors which limits the size of > applications that can be described (I know instructions are packed > offset some by packing and execution order limits). The return and data stack are separate and have 9 and 10 entries. The ROMs contain library calls for most basic of operations (like subtract or multiply). The 64-word RAMs probably give around 128 instructions after all the packing losses, required nops and inline literals. Given each instruction does very little this is not much at all. > The web site doesn't make a compelling case for applications that > could effectively use this processor. Compare this processor with > the parallax Propellor for example. The parallax processor is far > more flexible The Propellor is pretty odd as well (2 operands, 9-bit direct memory address) and also uses an unconventional programming language. Personally I'd prefer a fully featured core with single cycle instructions capable of running C. Wilco
Re: 40 core embeddified processor - 42Bastian Schick - 01:52 29-09-08
On Sat, 27 Sep 2008 00:47:43 +0100, "Wilco Dijkstra" <W...@ntlworld.com> wrote: >> The web site doesn't make a compelling case for applications that >> could effectively use this processor. Compare this processor with >> the parallax Propellor for example. The parallax processor is far >> more flexible > >The Propellor is pretty odd as well (2 operands, 9-bit direct memory address) >and also uses an unconventional programming language. Personally I'd prefer >a fully featured core with single cycle instructions capable of running C. :-) All these designs sound like someone wants to make the wheel a bit rounder then others (and fails). There must be a reason why no new design (despite DSP) realy made it to the common market. -- 42Bastian Do not email to b...@yahoo.com, it's a spam-only account :-) Use <same-name>@monlynx.de instead !