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Discussion Groups | Comp.Arch.Embedded | SDR SDRAM compability

There are 2 messages in this thread.

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SDR SDRAM compability - kalyanamsaritha - 19:45 16-09-08

Could someone explain how I would go about determining if a particular SDR
SDRAM (not DDR) is compatible with a CPU, AT91SAM9260 for example.

The cpu's Master Clock (MCK) runs at 100MHz which is the speed at which
the SDRAM controller clock (SDCK) also runs.

Does this automatically mean I should be looking for only PC100 rated SDR
SDRAM?

Any pointers would help the rest of us noobs out there!

Regards.



Re: SDR SDRAM compability - Vladimir Vassilevsky - 22:25 16-09-08


kalyanamsaritha wrote:

> Could someone explain how I would go about determining if a particular SDR
> SDRAM (not DDR) is compatible with a CPU, AT91SAM9260 for example.

Read the manual on the SDRAM controller in every detail.
Read the datasheet on the SDRAM in every detail.
Determine if the controller can be configured to interface with this 
particular SDRAM.

> The cpu's Master Clock (MCK) runs at 100MHz which is the speed at which
> the SDRAM controller clock (SDCK) also runs.
> 
> Does this automatically mean I should be looking for only PC100 rated SDR
> SDRAM?

Not necessarily. You should look at the details of the timing of the 
particular SDRAM and controller.

> Any pointers would help the rest of us noobs out there!

There are quite a few parameters that must be compatible: 2.5V or 3.3V, 
  number of banks, memory size, page size, burst length, init sequence 
type, refresh type and period, timings of the RAS/CAS signals in clocks 
and nanoseconds.


Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
http://www.abvolt.com