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Discussion Groups | Comp.Arch.Embedded | Semiconductor/Hardware Career Opportinity in Telecom Giant (top 5) -Santa Clara

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Semiconductor/Hardware Career Opportinity in Telecom Giant (top 5) -Santa Clara - JackChang - 11:31 28-08-08

Hi,

Our client, a top 5 telecom giant, have following openings in Santa
Clara office. Please send your resume to j...@jobirn.com if you
are interest, please include the position title.

Email: j...@jobirn.com

==============================
Position List:

1. Senior/Principal Analog IC Design Engineer
2. Senior CMOS RF IC Designer
3. Video&Image Algorithm Expert (2 openings)
4. Multimedia SOC Principal Engineer
5. Staff Analog Design Engineer --- Data Converter/AFE
6. Sr. SERDES Design Engineer
7. Principal Design Engineer/Chip Lead
==============================
Position Detail:

Position1:Senior/Principal Analog IC Design Engineer
Responsibilities:
As a principal chip designer, the job function is to be responsible to
architect analog modules, have good understanding of the design and
verification principles, provide guidance to junior engineers on
design/simulation/layout, and perform reviews to improve the quality
of delivery. He/she will also be actively involved in silicon
characterization, debugging, quality improving and releasing to
production.

Qualifications:

1. Master’s Degree or higher in Electrical Engineering or equivalent.

2. 5+ years experience on analog IC design, with at least two years
experience on data converter design or high speed interface design,
and having successful mixed-signal design track record.

3. In-depth knowledge and design experience on at least one of
following areas include high-speed/high-precision ADC/DAC, high speed
SERDES/PHY, ROM/RAM/EFLASH, high performance PLL, PMU. Knowledgeable
on digital signal processing or ESD is a plus.

Apply:http://jobirn.com/?jobid=2248




--------------------------------------

Position2:Senior CMOS RF IC Designer

Responsibilities:
Architecture and implement RFIC design, perform system/circuit design
and verification, supervise layout engineers on layout of RF/Analog
circuits.

Qualifications:

1. MSEE or PhD, approximately +3 years on RFIC design experience SiGe
or RFCMOS experience.

2. Strong design experience with chip level system design and circuit
design, such as LNA, mixer, PLL, VCO, filter, etc.

3. Familiar with RFIC design verification, tape out, debug and
characterization

4. Good Knowledge about device modeling and RF system.

5. Candidates will display good development thinking ability,
excellent communication skills, initiative, and a team attitude..

6. Experience on Zero IF WCDMA transceiver or GSM transceiver design
or GSM Power amplifier is a plus



Apply:http://jobirn.com/?jobid=2249




-----------------------------------------

Position3:Video&Image Algorithm Expert (2 openings)

Location: Santa Clara/Shenzhen/Beijing

Algorithm design/analysis/modeling in video or image processing
Qualifications
BS or higher in EE/CS/Math
8+ years experience in video or image processing algorithm design
Experience in algorithm modeling or implementation of DSP processor in
video standard protocols and graphics such as 2D/3D processing, image
scalar, OSD, image de-noise, AWB, AE, and AF

Apply:http://jobirn.com/?jobid=2250






---------------------------------------------
Position4: Multimedia SOC Principal Engineer
Be responsible for requirement analysis, system analysis, architecture
design and partition, analysis of performance trade-offs, issues and
looking for ways to improve architecture implementation and cost to
achieve competition capability for the multimedia processing high
performance SOC designs which will be part of the next generation of
video consumer electronics including high definition DVD players/
recorders, Set-top Boxes and Digital TVs.

Qualifications
Minimum of 8 years experience in design of signal processing ICs.
Experience in the architecture/design of multimedia processors for
consumer electronics, especially high definition DVD players /
recorders, HD Set-top Boxes and HD Digital TVs, is highly desirable.
Demonstrated ability to innovate and make architectural/design trade-
offs for balancing performance/power/area of designs
Multimedia experience including one or more of camera, display, video
codecs & standards, 2D & 3D graphics and multimedia processing is
required.
System experience including system loading, MIPS analysis, interfaces,
bandwidth optimization and STB architecture & digital video standards
is also required.



Apply:http://jobirn.com/?jobid=2251




------------------------------------------------
Position5:Staff Analog Design Engineer --- Data Converter/AFE

Roles and Responsibilities

Architect and implement analog and mixed-signal systems and circuits,
such as ADCs, DACs, and Analog Front End (AFE). Responsibility
includes circuit design, simulation/verification, layout supervision,
lab characterization/validation, and yield improvement.

Requirements:

1. At least 3 to 5 years’ analog IC design experience in a product
development environment.

2. Strong silicon design experience in at least one of the following
fields: high speed/high precision ADCs (pipelined/delta-sigma), high
speed/high precision DACs (current-steering/delta-sigma), analog
filters, Programmable Gain Amplifiers (PGA), High-speed amplifiers/op-
amps, and line drivers.

3. Knowledge/experience of data converter calibration (digital/analog)
is a plus.

4. Good lab debugging skills is a plus.

5. Knowledge of Matlab/Simulink modeling and simulation is a plus.

6. MS or Ph.D. in Electrical Engineering or related disciplines.

Apply:http://jobirn.com/?jobid=2252




----------------------------------------------------
Position6:Sr. SERDES Design Engineer

Position Summary:
Our Serdes design team is seeking an outstanding team member to help
us bring new products from design to market and provide fast, reliable
solutions to our customers. In this exciting role you will be
designing sophisticated high-performance Serdes with our Serdes team
to advance the technology solutions in the ASIC market.

Accountabilities:
-Design and verify sophisticated mixed-signal analog blocks for high-
speed SerDes such as PLL, CDR, Serializer, Deserializer, etc.
-Participate and be a key contributor in chip and block level
architectures.
-Develop circuit schematics and perform all necessary verification/
simulations.
-Assist in architecture, layout, integration, bring-up, post silicon
debugging, and characterization.
-Generate design review documentation.
-Interface with other design team members and provide directions to
layout and other design engineers, ensuring that electrical
performance meets specifications and requirements.
-Exchange information with, and provide guidance to, other team
members in their daily activities.
-Resolve a wide range of issues; fully proficient in understanding of
industry communication standards and test equipment tools.
-Self motivated team player.

Qualifications:
-BS/MS/PhD Electrical Engineering, and Good communication skills.
-5+ years of analog circuit design experience, mostly in high-speed
and low-jitter SERDES.
-Familiar with analog/mixed signal circuit design flow, hands-on
experience in designing high speed (> 6.5GHz) analog circuits such as
PLL, VCO, CDR, SERDES, equalizer.
-Familiar with design techniques and trade-offs on reducing jitter and
increasing operating frequency.
-Knowledge of physical layer.


Apply:http://jobirn.com/?jobid=2253




-----------------------------------------------
Position7:Principal Design Engineer/Chip Lead

Responsible for the system design, architecture, analysis, modeling,
and verification of complex, state-of-the-art SOC

-Participate in product definition with end system development and
marketing team
- Complete technical ownership of chip system design, assembly and
verification
- Specification and design/implementation of key blocks that make up
the SOC
- Coordination of design activities with IP vendors and remote design
centers
- Layout supervision of circuit blocks and floorplanning of the entire
chips
- Perform additional job related tasks as required


Qualifications
BSEE, MSEE a plus
8+ years of IC design experience, from specification definition to
production release, experience in IP/MPLS/Ethernet IC design area is a
plus
Solid understanding of the IC design & verification process
Experience with structured design (architecture, specification,
modeling, implementation, & verification) of complex SoC or digital
systems.
Familiarity with various IC design tools, Verilog or VHDL
Ability to work independently, lead projects from a technical
perspective & provide mentoring of more junior colleagues.
Excellent written & oral communications skills
In-depth knowledge in IP/MPLS/Ethernet protocols is a plus

Apply:http://jobirn.com/?jobid=2604



spam - TehPron - 11:42 28-08-08

spam