Hi guys....once again.

To introduce again, I am using gcc (arm-elf-gcc V 4.1.1 ) as cross
compiler for LPC2368 processor on Ubuntu and ....I am a newbee.

Initially I had problems with with compiling and linking which are
solved now. I am able to make the hex file also.But the hex file is
not working on the processor.

Here are the modified startup files , the source file and the linker
script.

/********************** crt0.S ************************************/

        .global _etext

        .global _data
        .global _edata
        .global __bss_start
        .global __bss_end__
        .global _stack

        .set  UND_STACK_SIZE, 0x00000004
        .set  ABT_STACK_SIZE, 0x00000004
        .set  FIQ_STACK_SIZE, 0x00000004
        .set  IRQ_STACK_SIZE, 0X00000080
        .set  SVC_STACK_SIZE, 0x00000004



        .set  MODE_USR, 0x10
        .set  MODE_FIQ, 0x11
        .set  MODE_IRQ, 0x12
        .set  MODE_SVC, 0x13
        .set  MODE_ABT, 0x17
        .set  MODE_UND, 0x1B
        .set  MODE_SYS, 0x1F

        .equ  I_BIT, 0x80

        .equ  F_BIT, 0x40


        .text
        .arm
        .section .init, "ax"

        .code 32
        .align 2

        .global _boot
        .func   _boot
_boot:



Vectors:
        b     _start
        ldr   pc,_undf
        ldr   pc,_swi
        ldr   pc,_pabt
        ldr   pc,_dabt
        nop
        ldr   pc,[pc,#-0xFF0]
        ldr   pc,_fiq

#if 0

_undf:  .word _reset
_swi:   .word _reset
_pabt:  .word _reset
_dabt:  .word _reset
_irq:   .word _reset
_fiq:   .word _reset


#else

_undf:  .word __undf
_swi:   .word __swi
_pabt:  .word __pabt
_dabt:  .word __dabt
_irq:   .word __irq
_fiq:   .word __fiq

__undf: b     .
__swi:  b     .
__pabt: b     .
__dabt: b     .
__irq:  b     .
__fiq:  b     .
#endif
        .size _boot, . - _boot
        .endfunc


        .global _start, start, _mainCRTStartup
        .func   _start

_start:
start:
_mainCRTStartup:


        ldr   r0,=_stack
        msr   CPSR_c,#MODE_UND|I_BIT|F_BIT

        mov   sp,r0
        sub   r0,r0,#UND_STACK_SIZE
        msr   CPSR_c,#MODE_ABT|I_BIT|F_BIT
        mov   sp,r0
        sub   r0,r0,#ABT_STACK_SIZE
        msr   CPSR_c,#MODE_FIQ|I_BIT|F_BIT
        mov   sp,r0
        sub   r0,r0,#FIQ_STACK_SIZE
        msr   CPSR_c,#MODE_IRQ|I_BIT|F_BIT
        mov   sp,r0
        sub   r0,r0,#IRQ_STACK_SIZE
        msr   CPSR_c,#MODE_SVC|I_BIT|F_BIT
        mov   sp,r0
        sub   r0,r0,#SVC_STACK_SIZE
        msr   CPSR_c,#MODE_SYS|I_BIT|F_BIT
        mov   sp,r0


#ifdef ROM_RUN
        ldr   r1,=_etext
        ldr   r2,=_data
        ldr   r3,=_edata
1:      cmp   r2,r3
        ldrlo r0,[r1],#4
        strlo r0,[r2],#4
        blo   1b
#endif

        mov   r0,#0
        ldr   r1,=__bss_start
        ldr   r2,=__bss_end__
2:      cmp   r1,r2
        strlo r0,[r1],#4
        blo   2b


        mov   r0,#0

        mov   r1,r0

        mov   r2,r0

        mov   fp,r0

        mov   r7,r0

        ldr   r10,=main

        mov   lr,pc

        bx    r10



        .size   _start, . - _start
        .endfunc

        .global _reset, reset, exit, abort
        .func   _reset
_reset:
reset:
exit:
abort:
#if 0

        mrs   r0,cpsr
        orr   r0,r0,#I_BIT|F_BIT
        msr   cpsr,r0

        ldr   r1,=(PS_BASE)
        ldr   r0,=(PS_PIO)
        str   r0,[r1,#PS_PCER_OFF]
        ldr   r1,=(PIO_BASE)
        ldr   r0,=(1<<23)
        str   r0,[r1,#PIO_PER_OFF]

        str   r0,[r1,#PIO_CODR_OFF]
        str   r0,[r1,#PIO_OER_OFF]
#endif
        b     .

        .size _reset, . - _reset
        .endfunc

        .end
/*************************************crt0.S ends
***********************************/




/
***********************************************************************/

/*
*/

/*  ROM.ld:  Linker Script File
*/

/*                     "RAMfunc" demo!!
*/

/
***********************************************************************/

ENTRY(_start)

STACK_SIZE = 0x400;



/* Memory Definitions */

/* lpc2129 mt */

MEMORY

{

  ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000

  RAM (rw) : ORIGIN = 0x40000000, LENGTH = 0x00008000

}



/* Section Definitions */

SECTIONS

{



   .text :

  {

    *crt0.o (.text)

    *(.text)

    *(.rodata)

    *(.rodata*)

    *(.glue_7)

    *(.glue_7t)

  } > ROM




  . = ALIGN(4);










  /* .data section which is used for initialized data */

  .data : AT (_etext)

  {

    _data = .;

    *(.data)

	*(.data.*)

	*(.gnu.linkonce.d*)

	SORT(CONSTRUCTORS) /* mt 4/2005 */

	. = ALIGN(4);

	*(.fastrun)

  } > RAM



  . = ALIGN(4);

  _edata = . ;

  PROVIDE (edata = .);



  /* .bss section which is used for uninitialized data */

  .bss (NOLOAD) :

  {

    __bss_start = . ;

    __bss_start__ = . ;

    *(.bss)

	*(.gnu.linkonce.b*)

    *(COMMON)

    . = ALIGN(4);

  } > RAM



  . = ALIGN(4);

  __bss_end__ = . ;

  PROVIDE (__bss_end = .);



  .stack :

  {

    *(.stack)
      *(.STACK)
    . = ALIGN(256);
/*    . += STACK_SIZE;*/

    PROVIDE (_stack = .);
    . = ALIGN(4);

  } > RAM



  _end = . ;

  PROVIDE (end = .);





}

/************************ ROM.ld ends*********************/






/********************* new.c ***********************/

#include "LPC23xx.h"

int main()
{
  PLLFEED = 0xAA;
  PLLFEED = 0x55;
  PLLCFG  = 0x40032;
  PLLFEED = 0xAA;
  PLLFEED = 0x55;
  PLLCON  = 0X03;
  PLLFEED = 0xAA;
  PLLFEED = 0x55;
  while(!(PLLSTAT & 0x04000000))
    {}

  CCLKCFG = 0x05;


   while(1)
     {
       IODIR0 = 0xFFFFFF;
       IOCLR0 = 0xFFFFFF;
     }

}


/****************************** new.c ends *************************/




And the commands used are :

 arm-elf-gcc -c new.c -o new.o
 arm-elf-gcc -c crt0.S -o crt0.o
 arm-elf-gcc -mcpu=arm7tdmi-s -nostdlib -nostartfiles crt0.o ROM.ld
new.o -o y.elf
 arm-elf-objcopy -O ihex y.elf zzz.hex




I am definitely missing something , but unable to figure it out.

All the geniuses out there...please help me out.


Thanks a million.
Nik

Guys ....Please please help me out.

nik wrote:
> Guys ....Please please help me out.

You need to be more specific about exactly what is wrong.  Do you have any 
kind of debugging equipmet (JTAG) so that you can see what is happening?  Is 
your code intended to run in Thumb mode? 

Thanks for responding Anthony.

> =A0Do you have any
> kind of debugging equipmet (JTAG) so that you can see what is happening?
   No , I dont have any debugger.

=A0> Is your code intended to run in Thumb mode?

No It is intended to run completely in ARM mode.


Do you think there are any issues with the startup file or the linker
script ?

Thanks.

On Oct 8, 12:12=A0pm, nik <nitinkoth...@gmail.com> wrote:
> Thanks for responding Anthony.
>
> > =A0Do you have any
> > kind of debugging equipmet (JTAG) so that you can see what is happening=
?
>
> =A0 =A0No , I dont have any debugger.
>
> =A0> Is your code intended to run in Thumb mode?
>
> No It is intended to run completely in ARM mode.
>
> Do you think there are any issues with the startup file or the linker
> script ?
>
> Thanks.

Nik,
  I too had a similar problem when I tried to build IntelHex record
using elf image.
Alternatively you can try(if you have installed Keil tools)
c:\keil\ARM\BIN30\fromelf.exe --ihex --target 0x00000000 --output
zzz.hex y.elf

ihex file expect a target address, say your board boots from a
location 0xc000000 in flash you should use
--target 0xc000000 above. Got it?

-syed

nik wrote:
> Thanks for responding Anthony.
>
>> Do you have any
>> kind of debugging equipmet (JTAG) so that you can see what is
>> happening?
>    No , I dont have any debugger.
>
>> Is your code intended to run in Thumb mode?
>
> No It is intended to run completely in ARM mode.
>
>
> Do you think there are any issues with the startup file or the linker
> script ?

It's almost impossible to say since we don't know what is happening.  I will 
say that your PLL setup stuff looks pretty bare after glancing at it.  I 
have working crt.S, PLL initialization code, VIC initialization, and GCC 
linker scripts for a LPC-2378-STK board.  If you want, I can e-mail them to 
you.  I haven't played with my ARM stuff since last December, so I'm pretty 
rusty on it all right now.  I got one of the real buggy early revision 
LPC2378s, so my code incorporates all the errata workarounds for it. 

On Oct 8, 6:36=A0pm, "sk.s...@yahoo.com" <sk.s...@yahoo.com> wrote:
> On Oct 8, 12:12=A0pm, nik <nitinkoth...@gmail.com> wrote:
>
> > Thanks for responding Anthony.
>
> > > =A0Do you have any
> > > kind of debugging equipmet (JTAG) so that you can see what is happeni=
ng?
>
> > =A0 =A0No , I dont have any debugger.
>
> > =A0> Is your code intended to run in Thumb mode?
>
> > No It is intended to run completely in ARM mode.
>
> > Do you think there are any issues with the startup file or the linker
> > script ?
>
> > Thanks.
>
> Nik,
> =A0 I too had a similar problem when I tried to build IntelHex record
> using elf image.
> Alternatively you can try(if you have installed Keil tools)
> c:\keil\ARM\BIN30\fromelf.exe --ihex --target 0x00000000 --output
> zzz.hex y.elf
>
> ihex file expect a target address, say your board boots from a
> location 0xc000000 in flash you should use
> --target 0xc000000 above. Got it?
>
> -syed

Hello Syed,

Thanks for the reply.But I am using gcc in Ubuntu.....so....keil is
not an option.
Anyways.....keep responding.

Thanks.
Nik.

On Oct 8, 9:17=A0pm, "Anthony Fremont" <nob...@noplace.net> wrote:
> nik wrote:
> > Thanks for responding Anthony.
>
> >> Do you have any
> >> kind of debugging equipmet (JTAG) so that you can see what is
> >> happening?
> > =A0 =A0No , I dont have any debugger.
>
> >> Is your code intended to run in Thumb mode?
>
> > No It is intended to run completely in ARM mode.
>
> > Do you think there are any issues with the startup file or the linker
> > script ?
>
> It's almost impossible to say since we don't know what is happening. =A0I=
 will
> say that your PLL setup stuff looks pretty bare after glancing at it. =A0=
I
> have working crt.S, PLL initialization code, VIC initialization, and GCC
> linker scripts for a LPC-2378-STK board. =A0If you want, I can e-mail the=
m to
> you. =A0I haven't played with my ARM stuff since last December, so I'm pr=
etty
> rusty on it all right now. =A0I got one of the real buggy early revision
> LPC2378s, so my code incorporates all the errata workarounds for it.

Hello Anthony,

It will be of great help if you mail me the file.
Please send it at n...@gmail.com

Thanks.

nik wrote:
> On Oct 8, 9:17 pm, "Anthony Fremont" <nob...@noplace.net> wrote:
>> nik wrote:
>>> Thanks for responding Anthony.
>>
>>>> Do you have any
>>>> kind of debugging equipmet (JTAG) so that you can see what is
>>>> happening?
>>> No , I dont have any debugger.
>>
>>>> Is your code intended to run in Thumb mode?
>>
>>> No It is intended to run completely in ARM mode.
>>
>>> Do you think there are any issues with the startup file or the
>>> linker script ?
>>
>> It's almost impossible to say since we don't know what is happening.
>> I will say that your PLL setup stuff looks pretty bare after
>> glancing at it. I have working crt.S, PLL initialization code, VIC
>> initialization, and GCC linker scripts for a LPC-2378-STK board. If
>> you want, I can e-mail them to you. I haven't played with my ARM
>> stuff since last December, so I'm pretty rusty on it all right now.
>> I got one of the real buggy early revision LPC2378s, so my code
>> incorporates all the errata workarounds for it.
>
> Hello Anthony,
>
> It will be of great help if you mail me the file.
> Please send it at n...@gmail.com
>
> Thanks.

Sent. 

On 15 Oct 2008 "Anthony Fremont" <n...@noplace.net> wrote:

[snip 3 entire previous posts]

> Sent.

Learn to snip.

---druck