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Discussion Groups | LPC2000 | Who can tell me the relationship between XCLK and CCLK?
Discussion group dedicated to the Philips LPC2000 family of ARM MCUs
Who can tell me the relationship between XCLK and CCLK? - fangneu - Sep 5 23:49:00 2005
Thank you very much and I wish that somebody can help me!!
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RE: Who can tell me the relationship between XCLK and CCLK? - Mark Crow - Sep 6 9:18:00 2005
Look at the LPC2000 user manual and look up the VPBDIV register.
-----Original Message-----
From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On Behalf Of
fangneu
Sent: Monday, September 05, 2005 11:50 PM
To: lpc2000@lpc2...
Subject: [lpc2000] Who can tell me the relationship between XCLK and CCLK? Thank you very much and I wish that somebody can help me!!
SPONSORED LINKS Microprocessor Microcontrollers Pic microcontrollers
8051 microprocessor ----------------------------------------------------------------------------
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-----Original Message-----
From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On Behalf Of
fangneu
Sent: Monday, September 05, 2005 11:50 PM
To: lpc2000@lpc2...
Subject: [lpc2000] Who can tell me the relationship between XCLK and CCLK? Thank you very much and I wish that somebody can help me!!
SPONSORED LINKS Microprocessor Microcontrollers Pic microcontrollers
8051 microprocessor ----------------------------------------------------------------------------
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Re: Who can tell me the relationship between XCLK and CCLK? - lpc2100_fan - Sep 6 20:05:00 2005
Mark,
if I am not mistaken VPBDIV is there to divide CCLK into PCLK
(Peripheral Clock). XCLK is the external clock, which is identical to
CCLK if the PLL is not used. Otherwise CCLK = XCLK * PLL factor
Nevertheless I could not find XCLK either in the data sheet or the
Users Manual, how did you come up with these terms?
Bob
--- In lpc2000@lpc2..., "Mark Crow" <mcrow@p...> wrote:
> Look at the LPC2000 user manual and look up the VPBDIV register.
> -----Original Message-----
> From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On
Behalf Of
> fangneu
> Sent: Monday, September 05, 2005 11:50 PM
> To: lpc2000@lpc2...
> Subject: [lpc2000] Who can tell me the relationship between XCLK
and CCLK? > Thank you very much and I wish that somebody can help me!!
>
----------------------------------------------------------------------------
> --
> YAHOO! GROUPS LINKS
>
> a..
______________________________
controlSUITE™ software. Comprehensive. Intuitive. Optimized.
Real-world software for real-time control. Details Here!
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )
if I am not mistaken VPBDIV is there to divide CCLK into PCLK
(Peripheral Clock). XCLK is the external clock, which is identical to
CCLK if the PLL is not used. Otherwise CCLK = XCLK * PLL factor
Nevertheless I could not find XCLK either in the data sheet or the
Users Manual, how did you come up with these terms?
Bob
--- In lpc2000@lpc2..., "Mark Crow" <mcrow@p...> wrote:
> Look at the LPC2000 user manual and look up the VPBDIV register.
> -----Original Message-----
> From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On
Behalf Of
> fangneu
> Sent: Monday, September 05, 2005 11:50 PM
> To: lpc2000@lpc2...
> Subject: [lpc2000] Who can tell me the relationship between XCLK
and CCLK? > Thank you very much and I wish that somebody can help me!!
>
----------------------------------------------------------------------------
> --
> YAHOO! GROUPS LINKS
>
> a..
______________________________
controlSUITE™ software. Comprehensive. Intuitive. Optimized.
Real-world software for real-time control. Details Here!
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )
Re: Re: Who can tell me the relationship between XCLK and CCLK? - Samuel - Sep 6 20:46:00 2005
If you place a 10Mhz crystal to the XTAL, the CCLK
will be 60Mhz, it in the datasheet. then of course you
have your pheripheral clock... --- lpc2100_fan <lpc2100_fan@lpc2...> wrote:
> Mark,
>
> if I am not mistaken VPBDIV is there to divide CCLK
> into PCLK
> (Peripheral Clock). XCLK is the external clock,
> which is identical to
> CCLK if the PLL is not used. Otherwise CCLK = XCLK *
> PLL factor
>
> Nevertheless I could not find XCLK either in the
> data sheet or the
> Users Manual, how did you come up with these terms?
>
> Bob
>
> --- In lpc2000@lpc2..., "Mark Crow"
> <mcrow@p...> wrote:
> > Look at the LPC2000 user manual and look up the
> VPBDIV register.
> > -----Original Message-----
> > From: lpc2000@lpc2...
> [mailto:lpc2000@lpc2...]On
> Behalf Of
> > fangneu
> > Sent: Monday, September 05, 2005 11:50 PM
> > To: lpc2000@lpc2...
> > Subject: [lpc2000] Who can tell me the
> relationship between XCLK
> and CCLK?
> >
> >
> > Thank you very much and I wish that somebody can
> help me!!
> >
>
----------------------------------------------------------------------------
> > --
> > YAHOO! GROUPS LINKS
> >
> > a..
> __________________________________________________
">http://mail.yahoo.com
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )
will be 60Mhz, it in the datasheet. then of course you
have your pheripheral clock... --- lpc2100_fan <lpc2100_fan@lpc2...> wrote:
> Mark,
>
> if I am not mistaken VPBDIV is there to divide CCLK
> into PCLK
> (Peripheral Clock). XCLK is the external clock,
> which is identical to
> CCLK if the PLL is not used. Otherwise CCLK = XCLK *
> PLL factor
>
> Nevertheless I could not find XCLK either in the
> data sheet or the
> Users Manual, how did you come up with these terms?
>
> Bob
>
> --- In lpc2000@lpc2..., "Mark Crow"
> <mcrow@p...> wrote:
> > Look at the LPC2000 user manual and look up the
> VPBDIV register.
> > -----Original Message-----
> > From: lpc2000@lpc2...
> [mailto:lpc2000@lpc2...]On
> Behalf Of
> > fangneu
> > Sent: Monday, September 05, 2005 11:50 PM
> > To: lpc2000@lpc2...
> > Subject: [lpc2000] Who can tell me the
> relationship between XCLK
> and CCLK?
> >
> >
> > Thank you very much and I wish that somebody can
> help me!!
> >
>
----------------------------------------------------------------------------
> > --
> > YAHOO! GROUPS LINKS
> >
> > a..
> __________________________________________________
">http://mail.yahoo.com
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )
Re: Who can tell me the relationship between XCLK and CCLK? - fangneu - Sep 6 21:37:00 2005
I get it.
In the register of VPBDIV you can set the XCLKDIV just as VPBDIV.
So XCLK can set as CCLK/1,CCLK/2 or CCLK/4.
Is it right? --- In lpc2000@lpc2..., Samuel <emddjava@y...> wrote:
> If you place a 10Mhz crystal to the XTAL, the CCLK
> will be 60Mhz, it in the datasheet. then of course you
> have your pheripheral clock... > --- lpc2100_fan <lpc2100_fan@y...> wrote:
>
> > Mark,
> >
> > if I am not mistaken VPBDIV is there to divide CCLK
> > into PCLK
> > (Peripheral Clock). XCLK is the external clock,
> > which is identical to
> > CCLK if the PLL is not used. Otherwise CCLK = XCLK *
> > PLL factor
> >
> > Nevertheless I could not find XCLK either in the
> > data sheet or the
> > Users Manual, how did you come up with these terms?
> >
> > Bob
> >
> > --- In lpc2000@lpc2..., "Mark Crow"
> > <mcrow@p...> wrote:
> > > Look at the LPC2000 user manual and look up the
> > VPBDIV register.
> > > -----Original Message-----
> > > From: lpc2000@lpc2...
> > [mailto:lpc2000@lpc2...]On
> > Behalf Of
> > > fangneu
> > > Sent: Monday, September 05, 2005 11:50 PM
> > > To: lpc2000@lpc2...
> > > Subject: [lpc2000] Who can tell me the
> > relationship between XCLK
> > and CCLK?
> > >
> > >
> > > Thank you very much and I wish that somebody can
> > help me!!
> > >
> >
> --------------------------------------------------------------------
--------
> > > --
> > > YAHOO! GROUPS LINKS
> > >
> > > a..
> > >
> >
> >
> > __________________________________________________
> ">http://mail.yahoo.com
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )
In the register of VPBDIV you can set the XCLKDIV just as VPBDIV.
So XCLK can set as CCLK/1,CCLK/2 or CCLK/4.
Is it right? --- In lpc2000@lpc2..., Samuel <emddjava@y...> wrote:
> If you place a 10Mhz crystal to the XTAL, the CCLK
> will be 60Mhz, it in the datasheet. then of course you
> have your pheripheral clock... > --- lpc2100_fan <lpc2100_fan@y...> wrote:
>
> > Mark,
> >
> > if I am not mistaken VPBDIV is there to divide CCLK
> > into PCLK
> > (Peripheral Clock). XCLK is the external clock,
> > which is identical to
> > CCLK if the PLL is not used. Otherwise CCLK = XCLK *
> > PLL factor
> >
> > Nevertheless I could not find XCLK either in the
> > data sheet or the
> > Users Manual, how did you come up with these terms?
> >
> > Bob
> >
> > --- In lpc2000@lpc2..., "Mark Crow"
> > <mcrow@p...> wrote:
> > > Look at the LPC2000 user manual and look up the
> > VPBDIV register.
> > > -----Original Message-----
> > > From: lpc2000@lpc2...
> > [mailto:lpc2000@lpc2...]On
> > Behalf Of
> > > fangneu
> > > Sent: Monday, September 05, 2005 11:50 PM
> > > To: lpc2000@lpc2...
> > > Subject: [lpc2000] Who can tell me the
> > relationship between XCLK
> > and CCLK?
> > >
> > >
> > > Thank you very much and I wish that somebody can
> > help me!!
> > >
> >
> --------------------------------------------------------------------
--------
> > > --
> > > YAHOO! GROUPS LINKS
> > >
> > > a..
> > >
> >
> >
> > __________________________________________________
> ">http://mail.yahoo.com
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )
RE: Re: Who can tell me the relationship between XCLK and CCLK? - Mark Crow - Sep 7 8:43:00 2005
Only 4 bits of VPBDIV are for controlling PCLK. The other 4 are for
selecting the CCLK vs XCLK rate (i.e. XCLK = .25 x CCLK or .5 x CCLK or 1 x
CCLK).
-----Original Message-----
From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On Behalf Of
lpc2100_fan
Sent: Tuesday, September 06, 2005 8:05 PM
To: lpc2000@lpc2...
Subject: [lpc2000] Re: Who can tell me the relationship between XCLK and
CCLK? Mark,
if I am not mistaken VPBDIV is there to divide CCLK into PCLK
(Peripheral Clock). XCLK is the external clock, which is identical to
CCLK if the PLL is not used. Otherwise CCLK = XCLK * PLL factor
Nevertheless I could not find XCLK either in the data sheet or the
Users Manual, how did you come up with these terms?
Bob
--- In lpc2000@lpc2..., "Mark Crow" <mcrow@p...> wrote:
> Look at the LPC2000 user manual and look up the VPBDIV register.
> -----Original Message-----
> From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On
Behalf Of
> fangneu
> Sent: Monday, September 05, 2005 11:50 PM
> To: lpc2000@lpc2...
> Subject: [lpc2000] Who can tell me the relationship between XCLK
and CCLK? > Thank you very much and I wish that somebody can help me!!
>
--------------------------------------------------------------------------
--
> --
> YAHOO! GROUPS LINKS
>
> a.. SPONSORED LINKS Microprocessor Microcontrollers Pic microcontrollers
8051 microprocessor ----------------------------------------------------------------------------
--
YAHOO! GROUPS LINKS
a.. ----------------------------------------------------------------------------
--
[Non-text portions of this message have been removed]
______________________________
controlSUITE™ software. Comprehensive. Intuitive. Optimized.
Real-world software for real-time control. Details Here!
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )
selecting the CCLK vs XCLK rate (i.e. XCLK = .25 x CCLK or .5 x CCLK or 1 x
CCLK).
-----Original Message-----
From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On Behalf Of
lpc2100_fan
Sent: Tuesday, September 06, 2005 8:05 PM
To: lpc2000@lpc2...
Subject: [lpc2000] Re: Who can tell me the relationship between XCLK and
CCLK? Mark,
if I am not mistaken VPBDIV is there to divide CCLK into PCLK
(Peripheral Clock). XCLK is the external clock, which is identical to
CCLK if the PLL is not used. Otherwise CCLK = XCLK * PLL factor
Nevertheless I could not find XCLK either in the data sheet or the
Users Manual, how did you come up with these terms?
Bob
--- In lpc2000@lpc2..., "Mark Crow" <mcrow@p...> wrote:
> Look at the LPC2000 user manual and look up the VPBDIV register.
> -----Original Message-----
> From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On
Behalf Of
> fangneu
> Sent: Monday, September 05, 2005 11:50 PM
> To: lpc2000@lpc2...
> Subject: [lpc2000] Who can tell me the relationship between XCLK
and CCLK? > Thank you very much and I wish that somebody can help me!!
>
--------------------------------------------------------------------------
--
> --
> YAHOO! GROUPS LINKS
>
> a.. SPONSORED LINKS Microprocessor Microcontrollers Pic microcontrollers
8051 microprocessor ----------------------------------------------------------------------------
--
YAHOO! GROUPS LINKS
a.. ----------------------------------------------------------------------------
--
[Non-text portions of this message have been removed]
______________________________
controlSUITE™ software. Comprehensive. Intuitive. Optimized.
Real-world software for real-time control. Details Here!
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )
RE: Re: Who can tell me the relationship between XCLK and CCLK? - Mark Crow - Sep 7 8:44:00 2005
Yes.
-----Original Message-----
From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On Behalf Of
fangneu
Sent: Tuesday, September 06, 2005 9:37 PM
To: lpc2000@lpc2...
Subject: [lpc2000] Re: Who can tell me the relationship between XCLK and
CCLK? I get it.
In the register of VPBDIV you can set the XCLKDIV just as VPBDIV.
So XCLK can set as CCLK/1,CCLK/2 or CCLK/4.
Is it right? --- In lpc2000@lpc2..., Samuel <emddjava@y...> wrote:
> If you place a 10Mhz crystal to the XTAL, the CCLK
> will be 60Mhz, it in the datasheet. then of course you
> have your pheripheral clock... > --- lpc2100_fan <lpc2100_fan@y...> wrote:
>
> > Mark,
> >
> > if I am not mistaken VPBDIV is there to divide CCLK
> > into PCLK
> > (Peripheral Clock). XCLK is the external clock,
> > which is identical to
> > CCLK if the PLL is not used. Otherwise CCLK = XCLK *
> > PLL factor
> >
> > Nevertheless I could not find XCLK either in the
> > data sheet or the
> > Users Manual, how did you come up with these terms?
> >
> > Bob
> >
> > --- In lpc2000@lpc2..., "Mark Crow"
> > <mcrow@p...> wrote:
> > > Look at the LPC2000 user manual and look up the
> > VPBDIV register.
> > > -----Original Message-----
> > > From: lpc2000@lpc2...
> > [mailto:lpc2000@lpc2...]On
> > Behalf Of
> > > fangneu
> > > Sent: Monday, September 05, 2005 11:50 PM
> > > To: lpc2000@lpc2...
> > > Subject: [lpc2000] Who can tell me the
> > relationship between XCLK
> > and CCLK?
> > >
> > >
> > > Thank you very much and I wish that somebody can
> > help me!!
> > >
> >
> --------------------------------------------------------------------
--------
> > > --
> > > YAHOO! GROUPS LINKS
> > >
> > > a..
> > >
> >
> >
> > __________________________________________________
> ">http://mail.yahoo.com
----------------------------------------------------------------------------
--
YAHOO! GROUPS LINKS
a.. ----------------------------------------------------------------------------
--
[Non-text portions of this message have been removed]
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )
-----Original Message-----
From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On Behalf Of
fangneu
Sent: Tuesday, September 06, 2005 9:37 PM
To: lpc2000@lpc2...
Subject: [lpc2000] Re: Who can tell me the relationship between XCLK and
CCLK? I get it.
In the register of VPBDIV you can set the XCLKDIV just as VPBDIV.
So XCLK can set as CCLK/1,CCLK/2 or CCLK/4.
Is it right? --- In lpc2000@lpc2..., Samuel <emddjava@y...> wrote:
> If you place a 10Mhz crystal to the XTAL, the CCLK
> will be 60Mhz, it in the datasheet. then of course you
> have your pheripheral clock... > --- lpc2100_fan <lpc2100_fan@y...> wrote:
>
> > Mark,
> >
> > if I am not mistaken VPBDIV is there to divide CCLK
> > into PCLK
> > (Peripheral Clock). XCLK is the external clock,
> > which is identical to
> > CCLK if the PLL is not used. Otherwise CCLK = XCLK *
> > PLL factor
> >
> > Nevertheless I could not find XCLK either in the
> > data sheet or the
> > Users Manual, how did you come up with these terms?
> >
> > Bob
> >
> > --- In lpc2000@lpc2..., "Mark Crow"
> > <mcrow@p...> wrote:
> > > Look at the LPC2000 user manual and look up the
> > VPBDIV register.
> > > -----Original Message-----
> > > From: lpc2000@lpc2...
> > [mailto:lpc2000@lpc2...]On
> > Behalf Of
> > > fangneu
> > > Sent: Monday, September 05, 2005 11:50 PM
> > > To: lpc2000@lpc2...
> > > Subject: [lpc2000] Who can tell me the
> > relationship between XCLK
> > and CCLK?
> > >
> > >
> > > Thank you very much and I wish that somebody can
> > help me!!
> > >
> >
> --------------------------------------------------------------------
--------
> > > --
> > > YAHOO! GROUPS LINKS
> > >
> > > a..
> > >
> >
> >
> > __________________________________________________
> ">http://mail.yahoo.com
----------------------------------------------------------------------------
--
YAHOO! GROUPS LINKS
a.. ----------------------------------------------------------------------------
--
[Non-text portions of this message have been removed]
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )
Re: Who can tell me the relationship between XCLK and CCLK? - lpc2100_fan - Sep 7 12:27:00 2005
Mark,
missed it, my bad. Thanks for the clarification!
Bob
--- In lpc2000@lpc2..., "Mark Crow" <mcrow@p...> wrote:
> Only 4 bits of VPBDIV are for controlling PCLK. The other 4 are for
> selecting the CCLK vs XCLK rate (i.e. XCLK = .25 x CCLK or .5 x CCLK
or 1 x
> CCLK).
> -----Original Message-----
> From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On
Behalf Of
> lpc2100_fan
> Sent: Tuesday, September 06, 2005 8:05 PM
> To: lpc2000@lpc2...
> Subject: [lpc2000] Re: Who can tell me the relationship between
XCLK and
> CCLK? > Mark,
>
> if I am not mistaken VPBDIV is there to divide CCLK into PCLK
> (Peripheral Clock). XCLK is the external clock, which is identical to
> CCLK if the PLL is not used. Otherwise CCLK = XCLK * PLL factor
>
> Nevertheless I could not find XCLK either in the data sheet or the
> Users Manual, how did you come up with these terms?
>
> Bob
>
> --- In lpc2000@lpc2..., "Mark Crow" <mcrow@p...> wrote:
> > Look at the LPC2000 user manual and look up the VPBDIV register.
> > -----Original Message-----
> > From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On
> Behalf Of
> > fangneu
> > Sent: Monday, September 05, 2005 11:50 PM
> > To: lpc2000@lpc2...
> > Subject: [lpc2000] Who can tell me the relationship between XCLK
> and CCLK?
> >
> >
> > Thank you very much and I wish that somebody can help me!!
> >
>
--------------------------------------------------------------------------
> --
> > --
> > YAHOO! GROUPS LINKS
> >
> > a..
> >
>
> SPONSORED LINKS Microprocessor Microcontrollers Pic microcontrollers
> 8051 microprocessor >
----------------------------------------------------------------------------
> --
> YAHOO! GROUPS LINKS
>
> a.. >
----------------------------------------------------------------------------
> -- >
> [Non-text portions of this message have been removed]
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )
missed it, my bad. Thanks for the clarification!
Bob
--- In lpc2000@lpc2..., "Mark Crow" <mcrow@p...> wrote:
> Only 4 bits of VPBDIV are for controlling PCLK. The other 4 are for
> selecting the CCLK vs XCLK rate (i.e. XCLK = .25 x CCLK or .5 x CCLK
or 1 x
> CCLK).
> -----Original Message-----
> From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On
Behalf Of
> lpc2100_fan
> Sent: Tuesday, September 06, 2005 8:05 PM
> To: lpc2000@lpc2...
> Subject: [lpc2000] Re: Who can tell me the relationship between
XCLK and
> CCLK? > Mark,
>
> if I am not mistaken VPBDIV is there to divide CCLK into PCLK
> (Peripheral Clock). XCLK is the external clock, which is identical to
> CCLK if the PLL is not used. Otherwise CCLK = XCLK * PLL factor
>
> Nevertheless I could not find XCLK either in the data sheet or the
> Users Manual, how did you come up with these terms?
>
> Bob
>
> --- In lpc2000@lpc2..., "Mark Crow" <mcrow@p...> wrote:
> > Look at the LPC2000 user manual and look up the VPBDIV register.
> > -----Original Message-----
> > From: lpc2000@lpc2... [mailto:lpc2000@lpc2...]On
> Behalf Of
> > fangneu
> > Sent: Monday, September 05, 2005 11:50 PM
> > To: lpc2000@lpc2...
> > Subject: [lpc2000] Who can tell me the relationship between XCLK
> and CCLK?
> >
> >
> > Thank you very much and I wish that somebody can help me!!
> >
>
--------------------------------------------------------------------------
> --
> > --
> > YAHOO! GROUPS LINKS
> >
> > a..
> >
>
> SPONSORED LINKS Microprocessor Microcontrollers Pic microcontrollers
> 8051 microprocessor >
----------------------------------------------------------------------------
> --
> YAHOO! GROUPS LINKS
>
> a.. >
----------------------------------------------------------------------------
> -- >
> [Non-text portions of this message have been removed]
(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )