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Hi

I am working on a project that interface with old hardware that was controled by 8032 CPU.

I using two platforms , the olimex LPC-L2294 and LPC-E2378STK as they have ext connectors for IO. I have deferrent results with the IO interface with the same basic code where I have IO jitters.

Now , my question is if I turn off the PLL clock, how can I determine the PCLK for both CPU. I would like to go back to basics to messure the timing using scope and what is the real deference with GPIO and FIO

Regards

Jean-Jacques
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Hi:

The PCLK depends of your register settings (PCLKSEL0 and PCLKSEL1). It could be CCLK, CCLK/2,CCLK/4,CCLK/8.

IO jitter is produced most likely because of the microcontroller design (internal bus connections, etc) and interrupts, which cause different timing for pin changes.

Without knowing what is your application, code, and requirements, it is hard to know, but I wouldn't suggest to rely on IO pins to generate periodic signals (as your post seems to suggest you're doing). It is better to use for example the PWM peripheral (LPC2378) or even timer output compare feature to generate more reliable signals.

In general, legacy GPIO pins are much slower that FIO pins.

What frequencies or other requirements you have?

Have you look into the LPC1758 (Cortex-M3 based processor). It can run up to 100MHz and the FIO pins are connected directly to the processor but, so that you can toggle them at 10ns (that is, if you don't need to do anything else).

Regards,

Alex.

--- In l...@yahoogroups.com, "jdauchot" wrote:
>
> Hi
>
> I am working on a project that interface with old hardware that was controled by 8032 CPU.
>
> I using two platforms , the olimex LPC-L2294 and LPC-E2378STK as they have ext connectors for IO. I have deferrent results with the IO interface with the same basic code where I have IO jitters.
>
> Now , my question is if I turn off the PLL clock, how can I determine the PCLK for both CPU. I would like to go back to basics to messure the timing using scope and what is the real deference with GPIO and FIO
>
> Regards
>
> Jean-Jacques
>
------------------------------------

______________________________
Stellaris® MCU Family: New Parts, New Package, New Price.


(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Hi

Thanks for reply

I am basically emulating the 80C32 external IO interface to access the lower 8 bits of the Address bus and the 8 bit data bus.

The exisiting circuit has a latch that first latches the lower 8 bits of the address bus using the ALE signal. I use 8 IO bits (AD0-AD7) to do this which also act has the data bus once the address as been latch in. I use 3 other IO bit to emulated the ALE , RD and WR signals. I reverse the direction of the 8 IO Bits data (Ad0-AD7) to do the WR operations. It sort of works, but I get jitters on the IO that controls relays and 7 segment LED displays

Hope that is clear enough

Regards

--- In l...@yahoogroups.com, "alexander_ribero" wrote:
>
> Hi:
>
> The PCLK depends of your register settings (PCLKSEL0 and PCLKSEL1). It could be CCLK, CCLK/2,CCLK/4,CCLK/8.
>
> IO jitter is produced most likely because of the microcontroller design (internal bus connections, etc) and interrupts, which cause different timing for pin changes.
>
> Without knowing what is your application, code, and requirements, it is hard to know, but I wouldn't suggest to rely on IO pins to generate periodic signals (as your post seems to suggest you're doing). It is better to use for example the PWM peripheral (LPC2378) or even timer output compare feature to generate more reliable signals.
>
> In general, legacy GPIO pins are much slower that FIO pins.
>
> What frequencies or other requirements you have?
>
> Have you look into the LPC1758 (Cortex-M3 based processor). It can run up to 100MHz and the FIO pins are connected directly to the processor but, so that you can toggle them at 10ns (that is, if you don't need to do anything else).
>
> Regards,
>
> Alex.
>
> --- In l...@yahoogroups.com, "jdauchot" wrote:
> >
> > Hi
> >
> > I am working on a project that interface with old hardware that was controled by 8032 CPU.
> >
> > I using two platforms , the olimex LPC-L2294 and LPC-E2378STK as they have ext connectors for IO. I have deferrent results with the IO interface with the same basic code where I have IO jitters.
> >
> > Now , my question is if I turn off the PLL clock, how can I determine the PCLK for both CPU. I would like to go back to basics to messure the timing using scope and what is the real deference with GPIO and FIO
> >
> > Regards
> >
> > Jean-Jacques
>

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Hi:

What is the required speed?

Regards,

Alex

--- In l...@yahoogroups.com, "jdauchot" wrote:
>
> Hi
>
> Thanks for reply
>
> I am basically emulating the 80C32 external IO interface to access the lower 8 bits of the Address bus and the 8 bit data bus.
>
> The exisiting circuit has a latch that first latches the lower 8 bits of the address bus using the ALE signal. I use 8 IO bits (AD0-AD7) to do this which also act has the data bus once the address as been latch in. I use 3 other IO bit to emulated the ALE , RD and WR signals. I reverse the direction of the 8 IO Bits data (Ad0-AD7) to do the WR operations. It sort of works, but I get jitters on the IO that controls relays and 7 segment LED displays
>
> Hope that is clear enough
>
> Regards
>
> --- In l...@yahoogroups.com, "alexander_ribero" wrote:
> >
> > Hi:
> >
> > The PCLK depends of your register settings (PCLKSEL0 and PCLKSEL1). It could be CCLK, CCLK/2,CCLK/4,CCLK/8.
> >
> > IO jitter is produced most likely because of the microcontroller design (internal bus connections, etc) and interrupts, which cause different timing for pin changes.
> >
> > Without knowing what is your application, code, and requirements, it is hard to know, but I wouldn't suggest to rely on IO pins to generate periodic signals (as your post seems to suggest you're doing). It is better to use for example the PWM peripheral (LPC2378) or even timer output compare feature to generate more reliable signals.
> >
> > In general, legacy GPIO pins are much slower that FIO pins.
> >
> > What frequencies or other requirements you have?
> >
> > Have you look into the LPC1758 (Cortex-M3 based processor). It can run up to 100MHz and the FIO pins are connected directly to the processor but, so that you can toggle them at 10ns (that is, if you don't need to do anything else).
> >
> > Regards,
> >
> > Alex.
> >
> >
> >
> > --- In l...@yahoogroups.com, "jdauchot" wrote:
> > >
> > > Hi
> > >
> > > I am working on a project that interface with old hardware that was controled by 8032 CPU.
> > >
> > > I using two platforms , the olimex LPC-L2294 and LPC-E2378STK as they have ext connectors for IO. I have deferrent results with the IO interface with the same basic code where I have IO jitters.
> > >
> > > Now , my question is if I turn off the PLL clock, how can I determine the PCLK for both CPU. I would like to go back to basics to messure the timing using scope and what is the real deference with GPIO and FIO
> > >
> > > Regards
> > >
> > > Jean-Jacques
> > >
>

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

--- In l...@yahoogroups.com, "jdauchot" wrote:
>
> Hi
>
> Thanks for reply
>
> I am basically emulating the 80C32 external IO interface to access the lower 8 bits of the Address bus and the 8 bit data bus.
>
> The exisiting circuit has a latch that first latches the lower 8 bits of the address bus using the ALE signal. I use 8 IO bits (AD0-AD7) to do this which also act has the data bus once the address as been latch in. I use 3 other IO bit to emulated the ALE , RD and WR signals. I reverse the direction of the 8 IO Bits data (Ad0-AD7) to do the WR operations. It sort of works, but I get jitters on the IO that controls relays and 7 segment LED displays
>
> Hope that is clear enough
>
> Regards
It sounds like you are changing the direction of pins that you shouldn't when you are messing with IODIR. Rather than do a read-modify=write on IODIR (as in IODIR = IODIR & ...) try holding a shadow of the current setting in a RAM variable. Modify the variable and stuff it into IODIR in one write-only operation.

If you are using IOSET and IOCLR, you should only be changing the pins you intend. You probably want to avoid IOPIN.

I have done programmed IO for things like compact flash and it always seemed to work just fine. The timing was never consistent or minimal but it worked.

Richard
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Hi Richard

Thanks for suggestions.
Can you give me a simple example of this.
And what is the alternative of IOPIN?

Regards
Jean-Jacques
--- In l...@yahoogroups.com, "rtstofer" wrote:
>
> --- In l...@yahoogroups.com, "jdauchot" wrote:
> >
> > Hi
> >
> > Thanks for reply
> >
> > I am basically emulating the 80C32 external IO interface to access the lower 8 bits of the Address bus and the 8 bit data bus.
> >
> > The exisiting circuit has a latch that first latches the lower 8 bits of the address bus using the ALE signal. I use 8 IO bits (AD0-AD7) to do this which also act has the data bus once the address as been latch in. I use 3 other IO bit to emulated the ALE , RD and WR signals. I reverse the direction of the 8 IO Bits data (Ad0-AD7) to do the WR operations. It sort of works, but I get jitters on the IO that controls relays and 7 segment LED displays
> >
> > Hope that is clear enough
> >
> > Regards
> It sounds like you are changing the direction of pins that you shouldn't when you are messing with IODIR. Rather than do a read-modify=write on IODIR (as in IODIR = IODIR & ...) try holding a shadow of the current setting in a RAM variable. Modify the variable and stuff it into IODIR in one write-only operation.
>
> If you are using IOSET and IOCLR, you should only be changing the pins you intend. You probably want to avoid IOPIN.
>
> I have done programmed IO for things like compact flash and it always seemed to work just fine. The timing was never consistent or minimal but it worked.
>
> Richard
>
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

--- In l...@yahoogroups.com, "jdauchot" wrote:
>
> Hi Richard
>
> Thanks for suggestions.
> Can you give me a simple example of this.
> And what is the alternative of IOPIN?
>
> Regards
If you want to SET pins 1 & 3 but leave the others alone:

IO0SET = (1<<1) | (1<<3);

If you want to CLEAR pins 1 & 3:

IO0CLR = (1<<1) | (1<<3);

This is the type of code you would use for RD', WR' or ALE. Just diddle with the signals you want.

If you have a databus on pins 8..15 then one way to deal with it is to first clear ALL of the pins and then set the ones you want from the 1 bits in the data byte.

IO0CLR = 0xff << 8;
IO0SET = DataByte << 8;

If there is a possibility that 'DataByte' has any of bits 8..31 set (depending on declaration), mask it with 0xff like:

IO0SET = (DataByte & 0xff) << 8;

I do change the pin direction with read-modify-write:

IO0PIN |= 0xff << 8; // turn the pins to output

IO0PIN &= ~(0xff << 8); // turn the pins to input

A better way to do it would be to define two pin setting variables what had just the right pattern of 1's and 0's. Then:

IOPIN = SET_BUS_FOR_INPUT; // pattern would be 0x????00??
or
IOPIN = SET_BUS_FOR_OUTPUT; // pattern would be 0x????ff??

The ? bits would be determined by how you are using the other pins.

Richard
------------------------------------



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