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--- In l...@yahoogroups.com, "Nishant Agrawal" wrote:
>
> Hi Nagaraju,
>
> I think the watchdog can be disabled by accessing the CPSR &
changing the
> value of bit I in it. Use asm mode __asm{}, i.e. for KEIL & there are
> special instructions for accessing CPSR MSR & ...look in the manual,
or ARM
> programming techniques.
>
>
>
> Bye
>
> With Regards
>
> Nishant Agrawal
>
>

The CPSR contains status information of the ARM core, and has nothing
to do with the watchdog, which is not part of the ARM core. Interrupts
can be disabled in the CPSR, but not the watchdog RESET. However, at
least in the LPC2148, the watchdog timer can be configured in a DEBUG
mode, where it only generates an interrupt, but no reset. That can be
setup during initialization by the write once bits in the WDMOD
register. Since doing that turns the watchdog timer into just another
timer generated interrupt, the watchdog timer is no longer a watchdog,
so it really should only be configured that way for debugging, or in
cases where you really are not going to be using a watchdog anyway.

Any watchdog that can be disabled by software is NOT a watchdog, since
it's function is to protect against errant software operation.

--Dave



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