LPC2000
Discussion group dedicated to the Philips LPC2000 family of ARM MCUs
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extra300_it - Jun 21 2005
Hello everybody.
Has anybody used UARTS with FIFO enabled on LPC22xx?
At first, I found this a big idea, but now that I'm trying to make it
work it doesn't seem to be ... 
naderus2000 - Mar 8 2007
I want to uart0 for tx long string with FIFO mode enable.
what is the best performance wat to do that?I want the min time I
must wait in this function.
here is a simple function... 
Hong Jiang - Feb 25 2005
Hi all members:
I can get a Rx FIFO depth through FCR register,but how can I calculate the Tx FIFO size.
According to the LPC2119 document,this CPU's UART is ... 
medw...@... - Sep 2 2005
...of course when I say that the manual doesn't mention the size of the SSP FIFo I'm obviously ignoring the very first page describing the SSP Features where it says there is... 
naderus2000 - Mar 1 2007
I need to fill 16 byte each time i recieve INT.so i must sure the the
FIFO is empty.
For testing that the USART0's FIFO is fully empty is it enough to check
the THRE or must... 
hodgejackiehank - Jul 6 2004
As soon as I write a single character to the THRE, Transmit holding
register empty flag in U1LSR is cleared. Either the FIFO is not
enabled or is set to '1', or thi... 
kumarvdpl - Jun 29 2005
Hi Friends,
I am using lpc 2104. I am using IAR EMBEDDED WORKBENCH to develope
program. I want to know about the Tx FIFO. I am writing values to UART1
TRANSMITTER HOL... 
"d.holzwarth" - Sep 20 2007
hello everyone
now that I (hopefully) understand the SPI I need some help with the
SSP interface in SPI mode.
I have a LPC2368 which is connected to an audio-codec (TI's AI... 
Jan Thogersen - Sep 1 2006
Hi all,
I'm playing with the uart fifo's on the LPC2148 and I have some problems
getting the receiver buffer timeout interrupt to work. When I disable
the fifo the interrupt... 
genie_23432 - Aug 3 2005
Hello,
After much fustration I appear to have solved most of my stability
issues (although not all of them). I seem to have an undocumented
issue with UART1 on the LP... 
extra300_it - Jun 15 2005
Hello,
I have an external circuit that echoes back the caracters that I am
sending out of UARTs.
Is there any way to disable RX while I'm transmitting (like Rx Enable ... 
suvidhk - Jan 5 2007
I am implementing software flow control and want to send an Xoff
character.How can I Transmit a character without flushing the Transmit
FIFO and without waiting for Transmit FIFO... 
srk - Nov 30 2006
Hi
The code written for rx data in LPC2129-uartO
U0LCR = 0x83;
U0DLL = 39; // baud rate = 9615 @ pclk = 6mhz
U0FCR ... 
Sam Lee - Feb 22 2007
Hi
I was working on the LPC3180 and i am currently trying out the 2 SPI
ports. getting one to receive and the other to transmit to each other.
I understand that there is a FIF... 
deliconn - Feb 7 2006
I am using the SSP on the LPC2148 as a buffered SPI interface to a
custom CPLD design. I love the FIFO for transactions where I only
need to write to the CPLD. But when I need... 
Tom Walsh - Oct 26 2006
Hello,
I've some confusion as to how the interrupts on the SSP operate and
don't seem to find any documentation regarding this. From the
documentation I've found so far, th... 
mgiaco82 - Jul 29 2007
Hello I have some questions concerning the SSP on the LPC2148. I need
to speak with one ADC and one DAC. So therefore I need 2 slave select
pins. But the LPC has only one. I know... 
Robert Adsett - Jan 28 2005
At 05:24 PM 1/28/05 +0000, you wrote:
>In looking at the SSP specification for the LPC2138, it can handle a
>maximum frame size of 16 bits. Does anyone know of a wa... 
Bill Wittig - Feb 18 2006
Hi,
In reading the User Manual (for the LPC213x), I'm unclear on the meaning
of the THRE bit in the LSR:
Does this mean the entire Tx FIFO is empty? That is, I can write 16
... 
Gerhard Unrecht - Apr 14 2005
Hey,
I want to clear the transmit-Fifo, to have a defined state.
Knows anybody how to do do this?
Regards
Gerhard Unrecht
[Non-text portions of this mes... 
jlowryspectrum - Mar 10 2005
Anyone know if I turn off the FIFO (U1FCR bit 0 = 0) will I still get
interrupts (if enabled) when a single character is received?
Or does turning off the F... 
Lowry, Jeff - Apr 29 2005
If I enable the TX FIFO do I have to keep track of how many characters
I've sent to THR so not to exceed 16? The transmit holding register
empty bit only says it's not empty... 
croquettegnu - Mar 15 2007
Hi All,
I'm really confused on how to deal with the SSP interrupts to manage
my SPI transfers.
There are two flags called RXIM and TXIM that allows to trig an
interrupt as so... 
Joel Winarske - Jan 27 2006
> On SPI, is the shift register different than the data register? In
> other words, if I am a slave, can I put data in the SPI data register
> any time even while a transition i... 
Adam Wilkinson - Feb 7 2005
Hi Folks,
Anyone know if there is a FIFO facility available for
the A/D? Reference is made to it on p240 of the
LPC2119/2129/2194/2292/2294 User Manual, bit 30... 
gen_4p - Jul 28 2006
Hello,
I am working on some SPI routines on SSP port (lpc2148) and need some
sanity check.
Approach for sending data is quite standard and straightforward -
- check if transmi... 
Mark Butcher - Dec 19 2007
Hi Ed
> Have you measured/seen any limitations with the luminary ethernet,
or is
> this more of a thought experiment? While the 2kB FIFO seems a bit small
> (and might p... 
tmasyl - Jan 15 2008
Greetings:
I find the LPC2138 User Guide rather vague for the SPI, SSP
peripherals. I wonder if there is additional support information for
these peripherals that I d... 
genie_23432 - Jul 20 2005
--- In lpc2000@lpc2..., "vajper0" wrote:
> Hi again!
>
> I just rewrote much of the UART code to slim it down and make it more
> efficient. It was rather crap... 
Michael Anton - May 26 2007
> -----Original Message-----
> From: l...@yahoogroups.com
> [mailto:l...@yahoogroups.com]On Behalf
> Of varuzhandanielyan
> Sent: Friday, May 25, 2007 12:34 AM
> To... 
kooroshhajiani - Mar 21 2007
I'm having some issue with the FIFO TRIGGER LEVEL of the UART Receive
interrupt.
For example if I set it for 4 bytes(bits 7:6=01 in the FIFO CONTROL
REGISTER)and lets say tha... 
ajellisuk - Jul 17 2008
Hi
I have a project were I'm using an LPC2148, and a MAX7349 for the
keypad interface. The MAX7349 has a FIFO register for storing key press
events.
I need to be able to ... 
Jan Thogersen - Sep 1 2006
Hi all,
I have a software fifo that is being filled up by my main loop and then
grabbed by an interrupts routine (TMR0). When entering the function that
pushes a value onto ... 
embeddedjanitor - Mar 4 2004
--- In , "Curt Powell"
wrote:
> Can someone point me to some circular buffer routines?
There are various ways to implement circular buffers. T... 
yxh510 - Apr 24 2005
HI,
When I using UART0 FIFO for receive 4 byte interrupt.the problem is:
It can only receive 3 byte then go interrupt.When I send 4 byte from PC to LPC2104
It go breakd... 
spec...@gmx.net - Nov 16 2007
I'm having some difficulty with my transmit interrupt on an LPC2106.
> I'm using winarm.
>
> My rx interrupt works perfect, when new data is present I quickly add
> it t... 
suvidhk - Feb 16 2007
I observed foll. behavior for the UART0 of LPC2368 :
1) Even if the FIFO is on I get an interrupt for receive data
available for a single char instead of receive character time... 
samiehg - Jan 11 2008
Hi
I am using the SSP module for TI Synch Serial frame format. Each frame
size is 16-bits.
For rx interrupts, the user manual suggests that RXIM in SSP1MSC
register is to tr... 
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