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This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

Frame Grabber using FPGA - ":: aH[sIM] ::" - Mar 12 21:04:30 2008

Hello,

I have decided to use c3088 camera which uses ov6620 from Omnivision on my project. I would like to grab 2 frames into the FPGA.

The camera has VSYNC, HREF, PCLK AND 8 bit for each pixel data.
VSYNC tells us the start of a new frame, HREF tells us the start of new line while PCLK tells us a new pixel coming in.

The camera provides 352x292 pixel but I'm only interested in the 1st 50x50 of the frame in the upper left corner.

I would like to save the array of data into the SDR SDRAM.

I've read some other project which is somewhat similar to mine.

The fella build a component to receive the data from the camera in vhd and then add that component into sopc builder.

I've also build component that would able to extract the first 50x50 pixels. and this is where i couldn't go further.

As, I'm quite new to this. I would like to know what is avalon in sopc builder, and what actually sopc builder do?

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Re: Frame Grabber using FPGA - John Kent - Mar 22 12:13:13 2008

Hi Sim

I'm not familiar with Avalon or the SOPC builder whatever that is, so
I'm afraid I cannot assist you with that.

I would like to say that the C3088 camera looks pretty nifty. It's
basically looks like a webcam sensor chip, but it's mounted on a PCB
with a pin header connector which makes it easy to interface to an FPGA.
I've bought a couple of miniature analog cameras to interface to the
VDEC-1 and XESS XST-3.0 digitizers, but they appear to have dynamic
chrominance and luminance controls which make them useless for any
machine vision applications.

The fact that you had access to the parallel output bus and serial bus
looked pretty handy for stereo vision where you need to have the cameras
locked on to each other. I found the cameras at Electronics123 courtesy
of a simple google search.

Subsampling the image sensor is basically a matter of designing a
horizontal and vertical timing chain, clocked by the camera pixel clock
and reset by the horizontal and vertical synch pulses. You just need
some comparators on the counters to tell you when you are inside the
active region, and write the pixel stream to memory. You may also need
some sort of dual port FIFO line buffer to handle the transfer to memory.

As I say ... I'm not familiar with the SOPC builder, so I'm afraid I
can't help you with that.

John.

:: aH[sIM] :: wrote:
> Hello,
>
> I have decided to use c3088 camera which uses ov6620 from Omnivision on my project. I would like to grab 2 frames into the FPGA.
>
> The camera has VSYNC, HREF, PCLK AND 8 bit for each pixel data.
> VSYNC tells us the start of a new frame, HREF tells us the start of new line while PCLK tells us a new pixel coming in.
>
> The camera provides 352x292 pixel but I'm only interested in the 1st 50x50 of the frame in the upper left corner.
>
> I would like to save the array of data into the SDR SDRAM.
>
> I've read some other project which is somewhat similar to mine.
>
> The fella build a component to receive the data from the camera in vhd and then add that component into sopc builder.
>
> I've also build component that would able to extract the first 50x50 pixels. and this is where i couldn't go further.
>
> As, I'm quite new to this. I would like to know what is avalon in sopc builder, and what actually sopc builder do?
>
-
http://www.johnkent.com.au
http://members.optushome.com.au/jekent
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