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FPGA-CPU

This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

  

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transactional memory   [2 Articles]

Jan Gray - Feb 13 2007
My friends, the big action these days in loveable programming models for shared memory synchronization is transactional memory. http://www.cs.wisc.edu/trans-memory/biblio/index.... transactional memory

exclusive access RAM   [6 Articles]

Rob Finch - Feb 11 2007
Have you ever looked at code guarded by mutexes and semaphores and wondered, "what if the guarded code were placed in a RAM block that ensured exclusive access to itself" ? ... exclusive access RAM

Timing Constraints   [4 Articles]

rtstofer - Dec 22 2006
I'm working on a project with the Spartan 3 Starter Board and the Xilinx WebPack ISE version 8.2 As I look over the timing results, there are lengthy delays in the paths conta... Timing Constraints

BRAM speed [was: Multi-context processor]

Tommy Thorn - Dec 4 2006
I just started playing with Xilinx Spartan 3E (speed grade -4) and I was appalled to find that even with extreme care can I only run the BRAMs at 170 MHz. Anything realistic and th... BRAM speed [was: Multi-context processor]

osx

Steve Dekorte - Nov 26 2006
Are there any FPGA PCI boards that support tools that work on OSX? ... osx

FW: Verilog simulator   [2 Articles]

J O - Nov 26 2006
Hello I want to continue exploration of cpu archtectures in my past time and wondered if anyone knew of a low cost verilog simulator that i could purchase for home use ? ... FW: Verilog simulator

Oddball bit widths

Rob Finch - Nov 22 2006
I think I found a relatively painless way to handle oddball bit widths, like 10 bit bytes, 20 bit instruction words, etc. when using standard memory parts. I struggled for a... Oddball bit widths

Looking For ALU Design

rtstofer - Nov 18 2006
I am looking for a 16 bit 2's complement ALU with add,subtract,multiply and divide as well as the usual shift and logical operations. This can be in multiple units like the 'yac... Looking For ALU Design

OpenTech 1.6.1

Jamil Khatib - Nov 18 2006
Hi, If you already know OpenTech then you have to know that the new release 1.6.1 is available now. OpenTech is the first world wide package of free open source hardware design... OpenTech 1.6.1

Polled interrupts - Barrel Processor   [2 Articles]

Rob Finch - Nov 17 2006
A barrel processor seems like a natural when the PLD has the ability to support multi-contexts. All of those "extra" registers are already just sitting there idle. It's very... Polled interrupts - Barrel Processor
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