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FPGA-CPU
This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
USB/NIOS-II
John Day - Dec 23 2007
Has anybody used the Opencores USB1.1 core on a NIOS-II?
I would be interested in contcting anyone who has.
John
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To uns... 
Strange syntax [13 Articles]
rtstofer - Dec 22 2007
In a project I didn't create there are expressions of the form:
if (atmp+btmp)(8) = '1'
then sr_c_ctrl ... Inferred Priority Encoder In VHDL [11 Articles]
rtstofer - Nov 29 2007
Consider something like:
result ... Re: Inferred Priority Encoder In VHDL [3 Articles]
Charles Steinkuehler - Nov 29 2007
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rtstofer wrote:
> The Verilog might look like:
>
> assign result = (sig1 ? a : 1'b0) |
> (sig2 ? b : 1'b0) |
> (sig3 ... use C++ int__64 type variables in NIOS IDE [2 Articles]
paria354 - Nov 6 2007
does anyone know how to use C++ int__64 type variables when we want to
implement it on NIOS IDE?
coz IDE doesn't support upper than 32 bit integers.how can we use them
in a bi... DCM multiplier / divider constant calculator tool
Rob Finch - Nov 3 2007
Really simple
http://www.birdcomputer.ca/Software/DCMCalc.exe
I got tired of guessing
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To unsubscribe, send a blank mes... Hirose FX2 Backplane ? [6 Articles]
Rob Finch - Oct 21 2007
Is there a Hirose FX2 100 pin backplane or cabling available ?
I'd like to connect some Nexys boards together.
Robert
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... Re: FPGA routing - was - RE: Re: POP-11 (PDP-11/40 in an FPGA) [4 Articles]
woodelf - Oct 20 2007
Austin Franklin wrote:
> I'm not sure how long it's been since you've done any FPGA work, but though
> that was true up through the 3k and less true with the 4k series of Xil... POP-11 (PDP-11/40 in an FPGA) [95 Articles]
Scott - Oct 18 2007
Hello,
I came across this old posting for the POP-11, but the original
URL no longer works. I'd really like to get the
VHDL source code for the POP-11 project if possible.
Ca... Inquiry about FPGA and PowerPC codesign
=?GB2312?B?1cXT8dH0?= - Sep 25 2007
Hi all
I am working on Xilinx ML310, with VirtexII pro fpga on it. Now I am trying
to make the FPGA and PowerPC cores(embedded in VirtexII Pro) co-work. For
example, build a f...