FPGA-CPU
This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
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Alex Gibson - Jun 19 2005
ST's new reconfigurable microcontroller with dual mac dsp
which has 16MBit DRAM, 300MHz ARM9, 600MHZ DSP, and a 150K FPGA,
Dual ethernet, ADC/DAC....
http://www... 
rtstofer - Jun 7 2005
Has anybody seen an app note that shows direct programming of a
Spartan IIE from a PC parallel port without using iMPACT, JTAG or an
intermediate device such as a CPLD?
... 
invincible1138 - Jun 2 2005
Hi all!
I want to know the most optimal way to implement FIFO/LRU/Random in
hardware. I am designing a cache and i need to implement these as
replacement algorithms.... 
Alex Gibson - May 24 2005
http://www.futureelectronics.com/promos/cyclone/
http://www.futureelectronics.com/promos/cyclone/docs/Cyclone.pdf
No ram and limited peripherals.
Unfilled sp... 
Lucian Damoc - May 7 2005
Hello,
I've designed a shifter using only MUXCYs (found in
Xilinx FPGAs). Instead of using the usual 2:1 MUX
(implemented in a LUT), I've used the MUXCY (see the
a... 
Alex Gibson - Apr 24 2005
They now have a virtex2 pro board
http://www.digilentinc.com/info/XUPV2P.cfm
nice academic price of US$299 (industry price of US$1599)
can take up to 2GB of ddr sdram... 
Rahul Vishal - Apr 21 2005
Hi everyone,
I am trying to do a post layout simulation. One that is done after the PnR
is over. I have got the Vhdl netlist and also the sdf file. But the
NClaunch ... 
xrisas1 - Apr 11 2005
I'm a student.I'm now learning VHDL. Help.
I'm looking for a generic vhdl library.
Registers,ALU,Shifter,RAM,SubSequencer.
HELP. Implementing CISC architecture... 
Rob Finch - Apr 9 2005
I'd would like to experiment with multi-processors but I couldn't
think of an application. Then I thought of playing a game of multi-
ball. Would anyone be interested in... 
Rob Finch - Apr 5 2005
I got to thinking about cpu instructions and hardware used to manage
semaphores. Then I got to thinking: why not make a memory with
semaphore operations built in instea... 
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