Sign in
Search fpga-cpu
Subscribe to fpga-cpu
Ads
fpga-cpu by Keywords
Altera | CISCifying | IDE | ISA | Java | JHDL | JTAG | LBU | MicroBlaze | PAR | PCI | RISC | SoC | Spartan | Transputers | Verilog | VHDL | Virtex | VLIW | WebPack | Xilinx | Xsoc | YARD-1A
Discussion Groups
FPGA-CPU
This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
regarding fpga kit [2 Articles]
vlsi_siva447 - Aug 19 2005
hi this sankar
i am working presently in fpga implementation of
adaptive beamforming in smart antennas in the field of
wireless communication.pls suggest to me which fpga ... 
Re: RAM loading via JTAG [7 Articles]
Piotr Zbysinski - EP\\H\\ - Aug 18 2005
----- Original Message -----
From: Richard Duits
To: lpc2000@lpc2...
Sent: Thursday, August 18, 2005 1:15 AM
Subject: Re: [lpc2000] RAM loading via JTAG
Wh... Question to ChipScope Pro users
Jae Young Hur - Aug 17 2005
Hi
I need some comment from ChipScope Pro users, as I am new to ChipScope Pro VIO. I am using Xilinx ISE 6.3.
Timing simulation after PAR (post place and route) simulation ... Conectivity - Register, OPB,dip switch [2 Articles]
ramt...@... - Aug 3 2005
Hi
I am looking for some help with the microblaze processor. I need to connect the registers on the microblaze processor to recieve input from the switches on the the boar... FPGA soft processors at Hot Chips [3 Articles]
Jan Gray - Aug 1 2005
I used to take vacation time to attend Hot Chips [hotchips.org] to learn
microprocessor design insights from the greats.
Now I see our own FPGA soft processor community ... about fpga-cpu (recurring message)
Jan Gray - Aug 1 2005
I wish to remind our members that messages to this list should be (at least
tangentially) on the subject of COMPUTER DESIGN and COMPUTER ARCHITECTURE
using FPGAs. (The mor... xilinx software on Linux ???
smxcu - Jul 31 2005
Hi Everyone,
Does anyone have any tips on getting the Linux port of the Xilinx
software to run on SuSE 9.3 ?
Regards
Sergio Masci
... Optimal states per bit [15 Articles]
Veronica Merryfield - Jul 22 2005
I wonder if anyone can give me some pointers on this.
Way back when I was at university, I can remember a tutorial on deriving the
optimal number of states per bit for a... Virtex-4 EDK7.1 and VGA display
kris...@... - Jul 8 2005
Hi,
I am trying to drive the VGA display on a ML402 board using EDK7.1i and ISE7.1. I am basically using the ML40x reference design provided by Xilinx.
The problem is that ...