AT90S2313 | AT90S8515 | ATMega | ATmega128 | ECL | FETS | IAR | Keyboard | LCD | STK50 | TMOS | UART

hello friends,
i have a new challenge ,which is to interface 3 AVR microcontrollers
to exchange the data
2 ATmeg 128 and one ATmeg 168

my need is to send data streams from both ATmeg 128 to the ATmeg 168
and to send it to RF transmitter from it

i am planning to keep both ATmeg 128 as masters and
ATmeg 168 as slave. is there any alternate implementation possible for
for this ?

how can i avoid the problems involved in the multimaster
implementation. i have gone through the data sheet and i am confused
it says to interlink all clock lines using AND logic
but how ? from all master signal to slave ?
if both masters try to send data , how can i control the situation

please give me some hints and ideas

thanks

joshy
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