Find help, specifications and source code for the LPC900. The LPC900 challenges Microchip and AVR based on the worlds most popular 8-bit architecture the 80C51. With a 2-clock core the LPC900 series is a high performance, very flexible and low cost 8-bit microcontroller family. Designers using or interested in these devices are encouraged to share their know-how and ask questions.
Building a parallel port ICP adapter - "leg.strong" - May 11 3:40:45 2008
Hi, everybody!
I am trying to build a parallel port ICP adapter. I think it will be
quite usefull and low cost.
But I can not read data from the device(LPC9107), the data line is
always high when read. What may be the problem?
To get in programming mode the RESET pin has to have a sequence of 7
pulses after the rising edge of VDD and the RST high time must between
1-32us, which is easy to achieve with today's computer. I measure the
pulse with oscilloscope, the timing falls in that range.
Anybody can help?
I get the ICP specification from this group, I will post the
documentation here when the adapter is ok.
Thanks everybody
------------------------------------

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Re: Building a parallel port ICP adapter - Stefano Panichi - May 11 4:44:44 2008
--- In l...@yahoogroups.com, "leg.strong"
wrote:
>
> Hi, everybody!
> I am trying to build a parallel port ICP adapter. I think it will be
> quite usefull and low cost.
>
> But I can not read data from the device(LPC9107), the data line is
> always high when read. What may be the problem?
>
> To get in programming mode the RESET pin has to have a sequence of 7
> pulses after the rising edge of VDD and the RST high time must between
> 1-32us, which is easy to achieve with today's computer. I measure the
> pulse with oscilloscope, the timing falls in that range.
>
> Anybody can help?
> I get the ICP specification from this group, I will post the
> documentation here when the adapter is ok.
> Thanks everybody
>
I think the parallel port of the PC has pull-up resistor that can
influence the reading. Please use a bidirectional transceiver like
74hc245 to force the state of the line.
------------------------------------

(You need to be a member of LPC900_users -- send a blank email to LPC900_users-subscribe@yahoogroups.com )Re: Re: Building a parallel port ICP adapter - Strong Leg - May 11 6:53:05 2008
It
dose have pull-up on the PDA line, because I use open-drain inverter 74HC05, connection
diagram is similiar to the parallel port-iic adapter(you can find it in the linux kernel
source tree\Documentation\i2c\busses\i2c-parport file), I remove the SCL read-back line
and add a 74HC244 to buffer the RESET signal.
Maybe I will try 74HC245 as you mention. If the pull-up(6.2 KOhm) does cause this
problem, it sounds a little strange. I doubt whether LPC9107 works
Here is the schematic(copy to text editor to make it clear):
Device
PC Side
______________________________3.3V (+)
Side
| |
|
|
--- --- ---
--- |
| |
| | | |
|
|R| |R| |R|
|R| |
| | | | | |
|
--- --- ---
---
| |
|
|
| | /|
| | PCL
----------x-----------o |-------------x-------------- pin
2
| \|
|
|
|
|
|
|
|
|
| |\
| | PDA ---------------x---x--|
o--------x------------------- pin
10
| |/
|
|
|
| /|
|
---o
|------------------x--------- pin
3
\|
|
|
|
|
---
---
| | |
|
|R|
|R|
| | |
|
---
---
| |
###
###
GND
GND
/| RST -----------------------/ |---------------------------- pin
1
\
|
\|
All resisters are 6.2KOhm
--- On Sun, 5/11/08, Stefano Panichi
<g...@yahoo.it> wrote:
From: Stefano Panichi <g...@yahoo.it> Subject: [lpc900_users] Re: Building
a parallel port ICP adapter To: l...@yahoogroups.com Date: Sunday, May 11, 2008,
8:44 AM
--- In lpc900_users@ yahoogroups. com, "leg.strong" <leg.strong@ ...>
wrote: > > Hi, everybody! > I am trying to build a parallel port ICP
adapter. I think it will be > quite usefull and low cost. > > But I
can not read data from the device(LPC9107) , the data line is > always high when
read. What may be the problem? > > To get in programming mode the RESET pin
has to have a sequence of 7 > pulses after the rising edge of VDD and the RST high
time must between > 1-32us, which is easy to achieve with today's computer. I
measure the > pulse with oscilloscope, the timing falls in that range. >
> Anybody can help? > I get the ICP specification from this group, I will
post the > documentation here when the adapter is ok. > Thanks
everybody >
I think
the parallel port of the PC has pull-up resistor that can influence the reading.
Please use a bidirectional transceiver like 74hc245 to force the state of the
line.
|
Be a better friend, newshound, and
know-it-all with Yahoo! Mobile.
Try it now.
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Re: Building a parallel port ICP adapter - Stefano Panichi - May 11 15:10:33 2008
Circuit is OK. If you are sure that all timings are respected then the
CPU doesn't work.
In particular mode check that tVR time (RST delay from VDD active) is
minimum 50 usec.
Regards
------------------------------------

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Re: Building a parallel port ICP adapter - Alexandre Pereira Nunes - Jun 3 17:41:55 2008
--- In l...@yahoogroups.com, "Stefano Panichi"
wrote:
>
> Circuit is OK. If you are sure that all timings are respected then the
> CPU doesn't work.
> In particular mode check that tVR time (RST delay from VDD active) is
> minimum 50 usec.
> Regards
>
Does anyone knows if such a circuit would also be ok for the LPC901?
In any case please report if it works, that would be interesting to know.
Cheers,
Alexandre
------------------------------------

(You need to be a member of LPC900_users -- send a blank email to LPC900_users-subscribe@yahoogroups.com )Re: Building a parallel port ICP adapter - lpc2100_fan - Jun 4 12:01:59 2008
Hi,
it's been a while since I was dealing with the LPC900 but this is what
I remember:
ICP is possible with all LPC900 devices, including the LPC901.
IAP is not possible with the LPC901.
If I am wrong, somebody please correct me.
Bob
--- In l...@yahoogroups.com, "Alexandre Pereira Nunes"
wrote:
>
> --- In l...@yahoogroups.com, "Stefano Panichi"
> wrote:
> >
> > Circuit is OK. If you are sure that all timings are respected then the
> > CPU doesn't work.
> > In particular mode check that tVR time (RST delay from VDD active) is
> > minimum 50 usec.
> > Regards
> > Does anyone knows if such a circuit would also be ok for the LPC901?
>
> In any case please report if it works, that would be interesting to
know.
>
> Cheers,
>
> Alexandre
>
------------------------------------

(You need to be a member of LPC900_users -- send a blank email to LPC900_users-subscribe@yahoogroups.com )Re: Re: Building a parallel port ICP adapter - Nilesh - Jun 4 13:27:56 2008
ISP Lite is possible with All LPC900..
Regards,
Nilesh (09925049517)
--- On Wed, 4/6/08, lpc2100_fan <l...@yahoo.com> wrote:
From: lpc2100_fan <l...@yahoo.com>
Subject: [lpc900_users] Re: Building a parallel port ICP adapter
To: l...@yahoogroups.com
Date: Wednesday, 4 June, 2008, 9:31 PM
Hi,
it's been a while since I was dealing with the LPC900 but this is what
I remember:
ICP is possible with all LPC900 devices, including the LPC901.
IAP is not possible with the LPC901.
If I am wrong, somebody please correct me.
Bob
--- In lpc900_users@ yahoogroups. com, "Alexandre Pereira Nunes"
<alexandrenunes_ 99@...> wrote:
>
> --- In lpc900_users@ yahoogroups. com, "Stefano Panichi"
> <gsembox-lpc@ > wrote:
> >
> > Circuit is OK. If you are sure that all timings are respected then the
> > CPU doesn't work.
> > In particular mode check that tVR time (RST delay from VDD active) is
> > minimum 50 usec.
> > Regards
> >
>
> Does anyone knows if such a circuit would also be ok for the LPC901?
>
> In any case please report if it works, that would be interesting to
know.
>
> Cheers,
>
> Alexandre
>
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