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Discussion Groups | AT91SAM ARM | TCM vs. internal SRAM

For users of the Atmel AT91SAM7 and AT91SAM9 ARM CPU chips. Atmel has taken a new direction by combining on chip flash and ram with the ARM CPU on a single die. This provides low cost devices for small systems using the ARM CPU. This group is to exchange information to help users get started and learn how to use the devices.

TCM vs. internal SRAM - "ICLI, Bekir (EXT)" - Mar 18 9:02:00 2008

Hi all,

I was curious if I could increase my performance using TCMs.
Currently, I am loading my interrupt handler code to internal fast SRAM.
Would it make sense if use part of this memory as I-TCM and load the irq
handlers to this location?
Regards,
Bekir



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Re: TCM vs. internal SRAM - 42Bastian - Mar 18 10:21:48 2008

ICLI, Bekir (EXT) schrieb:

> I was curious if I could increase my performance using TCMs.
> Currently, I am loading my interrupt handler code to internal fast SRAM.
> Would it make sense if use part of this memory as I-TCM and load the irq
> handlers to this location?

Yes. TCM runs at CPU speed, SRAM at AHB speed (1/2 of CPU speed).

--
42Bastian

Note: SPAM-only account, direct mail to bs42@...

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AW: TCM vs. internal SRAM - "ICLI, Bekir (EXT)" - Mar 18 11:46:17 2008

Hi Bastian,
=20
I guess I am missing something, while enabling the I-TCM.
I am doing the following:

#define ITCM_BASE 0x100000 /* In memory map, I-TCM is located=
at the second MB, but I have a feeling like what I am doing here might not=
be correct */
#define ITCM_SIZE (0x5 << 2) /* 16KB */
#define ITCM_ENABLE 0x1
#define ITCM_PATTERN (ITCM_BASE | ITCM_SIZE | ITCM_ENABLE)

MRC p15, 0, r1, c9, c1, 1=20=20=20=20=20=20=20
ORR r1, r1, #ITCM_PATTERN=20
MCR p15, 0, r1, c9, c1, 1=20

And I am copying the IRQ handler code not the the internal SRAM, but to the=
second MB.
But it stops at the first interrupt.
Should I take another measure to enable TCM??

Mit freundlichem Gru=DF / Best regards

Bekir ICLI

Siemens AG
Automation and Drives, Automation and Drives, A&D SC IC RD4
Tel. : +49 (721) 595-3280
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Managing Board: Peter Loescher, Chairman, President and Chief Executive Off=
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-----Urspr=FCngliche Nachricht-----
Von: A...@yahoogroups.com [mailto:A...@yahoogroups.com] Im Auftrag vo=
n 42Bastian
Gesendet: Dienstag, 18. M=E4rz 2008 15:16
An: A...@yahoogroups.com
Betreff: Re: [AT91SAM] TCM vs. internal SRAM

ICLI, Bekir (EXT) schrieb:

> I was curious if I could increase my performance using TCMs.
> Currently, I am loading my interrupt handler code to internal fast SRAM.
> Would it make sense if use part of this memory as I-TCM and load the irq
> handlers to this location?

Yes. TCM runs at CPU speed, SRAM at AHB speed (1/2 of CPU speed).

--=20
42Bastian

Note: SPAM-only account, direct mail to bs42@...

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