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Discussion Groups | 68HC12 | soft shut-off
Join our technical discussions about Freescale Microcontrollers: M68HC12. (Freescale Semiconductor is a Subsidiary of Motorola).
soft shut-off - Bob White - Oct 23 23:17:00 2002
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I'm using a timer pin to drive the gate of an IGBT that's designed for logic-level drive. I put a pull-down on the Timer Port output pin for a shut-off backup, and a series 100 Ohm resistor to the gate 'cause FETs really like that. It works fine. Now I want a soft turn-off mode for the FET, where I'd like to turn it off over a period of about a millisecond. I figured I can turn the OC pin into an input and let the gate charge die off slowly. This gives me a turn off of about 1 uS, not soft enough. It looks like the input loading is too big, and the gate capacitance is too small. Since I need to be able to switch the FET fast in its normal operation, I don't want to increase the series gate resistor. So I'm thinking that changing the pull-down to a capacitor might work, if it doesn't over-load the output port while driving, hoping that the OC driver can switch the capacitor fast enough, but that it will slow down the soft shutoff when the pin is configured to be an input and the cap is discharging into the input, acting like a bigger gate capacitance. This sure seems hokey, but it would be nice and simple. I was originally thinking I needed a current mirror set to drain the gate charge at the desired rate, when told to do so, but I'm out of pins, not to mention schedule and board space. The "Advance Information" book (MC68HC912B32) says "Output load capacitance" = 90 pF max. It also says "Three-state leakage" = +-2.5 uA max. If these things mean what they appear to (hoping "three-state" means input), it should be possible to calculate if it will work as I desire. I vaguely recall things like 1A = 1 Coulomb per Second and 1 Farad = 1 Coulomb per Volt. At about this point I figure it's time for bed. Any of you wizards got any comments? TIA, Bob White |
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A/D above Vdd ? - James M. Knox - Oct 24 9:06:00 2002
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Here's an annoyingly (should be) simple problem that I can't seem to see a good reliable solution to - at least not without significant extra circuitry. We need to run battery voltage into an A/D input on a D60A so we can estimate battery life. Unfortunately, this means that the battery voltage is present even if the D60A is powered off, meaning the input is well above Vdda. On some buffered A/D's I would just put a 1-meg resistor in series and diode shunt the input to Vdda. But this won't work with the HC12 line, since the input impedance of the A/D is fairly low. [Anyone know a realistic number? Something like 20K? And what is it with the D60A powered off? In the past we have had problems with diode clamped inputs to the A/D providing just enough "leakage" into Vdd to keep the processor from doing a clean power-on reset.] This is bound to be a fairly common problem. I hate to have to add a high-side FET or some such, for such a simple issue. Suggestions? jmk ----------------------------------------------- James M. Knox TriSoft ph 512-385-0316 1109-A Shady Lane fax 512-366-4331 Austin, Tx 78721 ----------------------------------------------- |
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Re: A/D above Vdd ? - zeta_alpha2002 - Oct 24 10:02:00 2002
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>Suggestions? Use a single OP-AMP as unity gain and connect the cell thru a limiting resistor to the non-inverting pin. We use this method to our board using a DP256 MCU. |
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Re: A/D above Vdd ? - Gordon Doughman - Oct 24 12:30:00 2002
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James, The specified input current for an A/D channel on the D60A is 100 nA max. @ 125C when the channel is not being sampled. As note 3 for Table 72 states: "Maximum leakage occurs at maximum operating temperature. Current decreases by approximately one-half for each 10C decrease from maximum temperature." As you can see, at a minimum, input impedance is going to be 50K at 125C and 200K at 105C. However, during sampling the input impedance is much lower. As you state, because of input protection/clamp diodes & internal power bussing it is never a good idea to have power applied to an I/O pin when Vdd is removed. Unfortunately, an op-amp or switch may be your only choice. Regards, Gordon "James M. Knox" wrote: > Here's an annoyingly (should be) simple problem that I can't seem to see a > good reliable solution to - at least not without significant extra circuitry. > > We need to run battery voltage into an A/D input on a D60A so we can > estimate battery life. Unfortunately, this means that the battery voltage > is present even if the D60A is powered off, meaning the input is well above > Vdda. > > On some buffered A/D's I would just put a 1-meg resistor in series and > diode shunt the input to Vdda. But this won't work with the HC12 line, > since the input impedance of the A/D is fairly low. > > [Anyone know a realistic number? Something like 20K? And what is it with > the D60A powered off? In the past we have had problems with diode clamped > inputs to the A/D providing just enough "leakage" into Vdd to keep the > processor from doing a clean power-on reset.] > > This is bound to be a fairly common problem. I hate to have to add a > high-side FET or some such, for such a simple issue. Suggestions? > > jmk > > ----------------------------------------------- > James M. Knox > TriSoft ph 512-385-0316 > 1109-A Shady Lane fax 512-366-4331 > Austin, Tx 78721 > ----------------------------------------------- > -------------------------------------------------------- > To unsubscribe from this group, send an email to: > To learn more about Motorola Microcontrollers, please visit > http://www.motorola.com/mcu > -- =============================================================== Gordon Doughman Ph: 937-438-6811 Motorola Semiconductor Fax: 937-434-7457 Field Applications Engineer Pager: 800-759-8352 Pin: 1304089 Suite 175 3131 Newmark Drive Miamisburg, OH 45342 Check out my HC12 book at: http://www.rtcgroup.com/books/ |
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